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From: Smita Koralahalli <Smita.KoralahalliChannabasappa@amd.com>
To: Lukas Wunner <lukas@wunner.de>
Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	Bjorn Helgaas <bhelgaas@google.com>,
	oohall@gmail.com, Mahesh J Salgaonkar <mahesh@linux.ibm.com>,
	Kuppuswamy Sathyanarayanan 
	<sathyanarayanan.kuppuswamy@linux.intel.com>,
	Yazen Ghannam <yazen.ghannam@amd.com>,
	Fontenot Nathan <Nathan.Fontenot@amd.com>
Subject: Re: [PATCH v2 2/2] PCI: pciehp: Clear the optional capabilities in DEVCTL2 on a hot-plug
Date: Wed, 21 Jun 2023 11:55:08 -0700	[thread overview]
Message-ID: <ee23accf-3e2e-773b-dc6c-81d9e18d0d0e@amd.com> (raw)
In-Reply-To: <20230621071259.GA2028@wunner.de>

On 6/21/2023 12:12 AM, Lukas Wunner wrote:
> On Fri, Jun 16, 2023 at 04:34:27PM -0700, Smita Koralahalli wrote:
>> On 6/16/2023 11:24 AM, Lukas Wunner wrote:
>>> On Mon, May 22, 2023 at 03:23:31PM -0700, Smita Koralahalli wrote:
>>>> On 5/11/2023 4:19 AM, Lukas Wunner wrote:
>>>>> On Tue, Apr 18, 2023 at 09:05:26PM +0000, Smita Koralahalli wrote:
>>>> Some couple of ways we think could be:
>>>> [1] Check if these bits are enabled by Platform at boot time, clear them
>>>> only it is set during hotplug flow.
>>>> [2] Clear them unconditionally as I did..
>>>> [3] Enable 10-bits tags in Linux when a device is probed just like how
>>>> we do for ARI..
>>>>
>>>> Similarly call pci_enable_atomic_ops_to_root() during a hot add..
>>>
>>> Personally I'm fine with option [2].  If you or Bjorn prefer option [3],
>>> I'm fine with that as well.
>>
>> Looking forward for Bjorn comments!
> 
> You may want to consider first doing [2], i.e. clear the DevCtl2 bits
> on hot removal, and then in a separate step do [3], i.e. add support
> for enabling 10 bit tags and atomic ops in the kernel.  Having that
> would certainly be useful, but it's more complex than just clearing
> the DevCtl2 bits on unplug.  So you may want to do the latter as a
> stop-gap.

Okay I just sent v3 now. I will take care of this in v4 along with other
comments in v3.

Thanks,
Smita
> 
> Thanks,
> 
> Lukas


  reply	other threads:[~2023-06-21 18:55 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-04-18 21:05 [PATCH v2 0/2] PCI: pciehp: Add support for native AER and DPC handling on async remove Smita Koralahalli
2023-04-18 21:05 ` [PATCH v2 1/2] PCI: pciehp: Add support for async hotplug with native AER and DPC/EDR Smita Koralahalli
2023-05-09 21:10   ` Sathyanarayanan Kuppuswamy
     [not found]     ` <5efcb6a9-5878-1e26-dd43-2e4bd01bc8a1@amd.com>
2023-05-11  6:56       ` Lukas Wunner
2023-05-16 10:10   ` Lukas Wunner
2023-05-22 22:23     ` Smita Koralahalli
2023-06-16 17:31       ` Lukas Wunner
2023-06-16 23:30         ` Smita Koralahalli
2023-06-17  7:59           ` Lukas Wunner
2023-04-18 21:05 ` [PATCH v2 2/2] PCI: pciehp: Clear the optional capabilities in DEVCTL2 on a hot-plug Smita Koralahalli
2023-05-11 11:19   ` Lukas Wunner
2023-05-22 22:23     ` Smita Koralahalli
2023-06-16 18:24       ` Lukas Wunner
2023-06-16 23:34         ` Smita Koralahalli
2023-06-21  7:12           ` Lukas Wunner
2023-06-21 18:55             ` Smita Koralahalli [this message]
2023-05-09 20:58 ` [PATCH v2 0/2] PCI: pciehp: Add support for native AER and DPC handling on async remove Smita Koralahalli
2023-06-12 17:54   ` Bjorn Helgaas
2023-06-12 19:31     ` Smita Koralahalli

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