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[2.80.170.125]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4771e196a9asm17054265e9.7.2025.10.28.16.35.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Oct 2025 16:35:49 -0700 (PDT) Message-ID: Subject: Re: [PATCH v1 1/2] dt-bindings: PCI: ti,j721e-pci-host: Add optional regulator supplies From: Vitor Soares To: Manivannan Sadhasivam Cc: Krzysztof Kozlowski , Bjorn Helgaas , Lorenzo Pieralisi , Krzysztof =?UTF-8?Q?Wilczy=C5=84ski?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Kishon Vijay Abraham I , Vitor Soares , linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Date: Tue, 28 Oct 2025 23:35:48 +0000 In-Reply-To: References: <20251014112553.398845-1-ivitro@gmail.com> <20251014112553.398845-2-ivitro@gmail.com> <20251020-kickass-fervent-capybara-9c48a0@kuoka> <2c3e4bdefb306dc89c15bebc549d854ea2b4cc32.camel@gmail.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.44.4-0ubuntu2 Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 On Tue, 2025-10-28 at 11:11 +0530, Manivannan Sadhasivam wrote: > On Mon, Oct 27, 2025 at 11:22:26PM +0000, Vitor Soares wrote: > > Hi Krzysztof, > >=20 > > Thank you for the feedback. > >=20 > > On Mon, 2025-10-20 at 13:14 +0200, Krzysztof Kozlowski wrote: > > > On Tue, Oct 14, 2025 at 12:25:48PM +0100, Vitor Soares wrote: > > > > From: Vitor Soares > > > >=20 > > > > Add optional regulator supply properties for PCIe endpoints on TI S= oCs. > > > > Some boards provide dedicated regulators for PCIe devices, such as > > > > 1.5V (miniPCIe), 3.3V (common for M.2 or miniPCIe), or 12V > > > > (for high-power devices). These supplies are now described as optio= nal > > > > properties to allow the driver to control endpoint power where > > > > supported. > > >=20 > > > Last sentence is completely redundant. Please do not describe DT, we > > > all can read the patch. Driver is irrelevant here. > > >=20 > > >=20 > > Ack, I will remove last sentence. > >=20 > > >=20 > > > How you described here and in descriptions, suggests these are rather > > > port properties, not the controller. > >=20 > > You are right - these supplies power the PCIe slot/connector, not the > > controller > > itself. However, as per my understanding, the current kernel practice i= s to > > place slot supplies in the root complex node rather than the endpoint n= ode. > > as > > seen in e.g.: > > - imx6q-pcie.yaml > > - rockchip-dw-pcie.yaml > > - rcar-pci-host.yaml > >=20 > > This seems consistent with those existing bindings, but please let me k= now > > if > > I=E2=80=99m overlooking something specific to this case. > >=20 >=20 > We do not properly document it, but defining the slot supplies in host br= idge > (controller) node is deprecated. Some bindings still do it for legacy rea= sons, > but the new ones should define them in the Root Port nodes as they belong= to. > We > do not have a separate DT node for PCI slots, but rather reuse the Root P= ort > node. >=20 > There are also bindings that define supplies in the endpoint node. They d= o it > for devices directly connected to the PCI bus without a connector (like i= n > PCB). >=20 > - Mani >=20 Thanks for the clarification and context. From what I understand, the recommendation is to define the supply regulators under the individual root= port node rather than in the host bridge (controller) node, as the supplies conceptually belong to each port rather than the controller itself. On the j721e PCIe controller, the current driver implementation assumes a s= ingle root port and doesn=E2=80=99t parse child port nodes. To follow the new con= vention, I=E2=80=99d need to refactor the driver to support root port subnodes, and I wonder if = the PHY reference and reset should also be moved to the Root Port node in that = case. Could you please point me to an example of a PCIe controller binding or dri= ver that already follows this approach? Best regards, Vitor Soares