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From: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
To: Bjorn Helgaas <helgaas@kernel.org>
Cc: linux-pci@vger.kernel.org, Bjorn Helgaas <bhelgaas@google.com>,
	 Dominik Brodowski <linux@dominikbrodowski.net>,
	 LKML <linux-kernel@vger.kernel.org>,
	 Simon Richter <Simon.Richter@hogyros.de>
Subject: Re: [PATCH 05/23] PCI: Remove old_size limit from bridge window sizing
Date: Tue, 27 Jan 2026 13:39:39 +0200 (EET)	[thread overview]
Message-ID: <fb05789e-6a9a-6051-e3fa-ce9ac168c5df@linux.intel.com> (raw)
In-Reply-To: <20260126200951.GA301074@bhelgaas>

[-- Attachment #1: Type: text/plain, Size: 6784 bytes --]

On Mon, 26 Jan 2026, Bjorn Helgaas wrote:

> On Mon, Jan 26, 2026 at 11:16:01AM -0600, Bjorn Helgaas wrote:
> > On Fri, Dec 19, 2025 at 07:40:18PM +0200, Ilpo Järvinen wrote:
> > > calculate_memsize() applies lower bound to the resource size before
> > > aligning the resource size making it impossible to shrink bridge window
> > > resources. I've not found any justification for this lower bound and
> > > nothing indicated it was to work around some HW issue.
> > > 
> > > Prior to the commit 3baeae36039a ("PCI: Use pci_release_resource()
> > > instead of release_resource()"), releasing a bridge window during BAR
> > > resize resulted in clearing start and end address of the resource.
> > > Clearing addresses destroys the resource size as a side-effect,
> > > therefore nullifying the effect of the old size lower bound.
> > > 
> > > After the commit 3baeae36039a ("PCI: Use pci_release_resource() instead
> > > of release_resource()"), BAR resize uses the aligned old size, which
> > > results in exceeding what fits into the parent window in some cases:
> > > 
> > > xe 0030:03:00.0: [drm] Attempting to resize bar from 256MiB -> 16384MiB
> > > xe 0030:03:00.0: BAR 0 [mem 0x620c000000000-0x620c000ffffff 64bit]: releasing
> > > xe 0030:03:00.0: BAR 2 [mem 0x6200000000000-0x620000fffffff 64bit pref]: releasing
> > > pci 0030:02:01.0: bridge window [mem 0x6200000000000-0x620001fffffff 64bit pref]: releasing
> > > pci 0030:01:00.0: bridge window [mem 0x6200000000000-0x6203fbff0ffff 64bit pref]: releasing
> > > pci 0030:00:00.0: bridge window [mem 0x6200000000000-0x6203fbff0ffff 64bit pref]: was not released (still contains assigned resources)
> > > pci 0030:00:00.0: Assigned bridge window [mem 0x6200000000000-0x6203fbff0ffff 64bit pref] to [bus 01-04] free space at [mem 0x6200400000000-0x62007ffffffff 64bit pref]
> > > pci 0030:00:00.0: Assigned bridge window [mem 0x6200000000000-0x6203fbff0ffff 64bit pref] to [bus 01-04] cannot fit 0x4000000000 required for 0030:01:00.0 bridging to [bus 02-04]
> > > 
> > > The old size of 0x6200000000000-0x6203fbff0ffff resource was used as
> > > the lower bound which results in 0x4000000000 size request due to
> > > alignment. That exceed what can fit into the parent window.
> > > 
> > > Since the lower bound never even was enforced fully because the
> > > resource addresses were cleared when the bridge window is released,
> > > remove the old_size lower bound entirely and trust the calculated
> > > bridge window size is enough.
> > > 
> > > This same problem may occur on io window side but seems less likely to
> > > cause issues due to general difference in alignment. Removing the lower
> > > bound may have other unforeseen consequences in case of io window so
> > > it's better to do leave as -next material if no problem is reported
> > > related to io window sizing (BAR resize shouldn't touch io windows
> > > anyway).
> > > 
> > > Reported-by: Simon Richter <Simon.Richter@hogyros.de>
> > 
> > I guess this report was
> > https://lore.kernel.org/r/f9a8c975-f5d3-4dd2-988e-4371a1433a60@hogyros.de/,
> > right?
> 
> And this looks like a regression in v6.18 that will persist in v6.19.
> 
> Is that the right thing?  I wonder if we should move these first five
> patches to pci/for-linus so they land in v6.19?

Fine with me if you want to do that. Stable people would pick things that 
landing in the merge window into Linus' tree anyway so the difference 
isn't going to be that huge.

Patch 3 is the scariest of the changes and is not strictly even a fix 
(without it there are two parallel alignment approaches though which 
wastes some stack space). It will have some impact on resource allocation 
when the new approach is enabled for everything were as previously the new 
sizing/alignment approached were only used in the relative safe haven of 
relaxed tail alignment cases; though in my tests, surprisingly few changes 
did occur.

The patch 4 too is on the edge, if you want to push that through for-linus 
(but it's not dangerous and is useful for complex topos).

I don't know how you are going to handle the pci/resource branch then 
though as I expect the rest of the series to not apply cleanly without 
those 5 patches.

-- 
 i.

> > > Fixes: 3baeae36039a ("PCI: Use pci_release_resource() instead of release_resource()")
> > > Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
> > > ---
> > >  drivers/pci/setup-bus.c | 11 +++--------
> > >  1 file changed, 3 insertions(+), 8 deletions(-)
> > > 
> > > diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c
> > > index 612288716ba8..8660449f59bd 100644
> > > --- a/drivers/pci/setup-bus.c
> > > +++ b/drivers/pci/setup-bus.c
> > > @@ -1071,16 +1071,13 @@ static resource_size_t calculate_memsize(resource_size_t size,
> > >  					 resource_size_t min_size,
> > >  					 resource_size_t add_size,
> > >  					 resource_size_t children_add_size,
> > > -					 resource_size_t old_size,
> > >  					 resource_size_t align)
> > >  {
> > >  	if (size < min_size)
> > >  		size = min_size;
> > > -	if (old_size == 1)
> > > -		old_size = 0;
> > >  
> > >  	size = max(size, add_size) + children_add_size;
> > > -	return ALIGN(max(size, old_size), align);
> > > +	return ALIGN(size, align);
> > >  }
> > >  
> > >  resource_size_t __weak pcibios_window_alignment(struct pci_bus *bus,
> > > @@ -1298,7 +1295,6 @@ static void pbus_size_mem(struct pci_bus *bus, unsigned long type,
> > >  	resource_size_t children_add_size = 0;
> > >  	resource_size_t children_add_align = 0;
> > >  	resource_size_t add_align = 0;
> > > -	resource_size_t old_size;
> > >  
> > >  	if (!b_res)
> > >  		return;
> > > @@ -1364,11 +1360,10 @@ static void pbus_size_mem(struct pci_bus *bus, unsigned long type,
> > >  		}
> > >  	}
> > >  
> > > -	old_size = resource_size(b_res);
> > >  	win_align = window_alignment(bus, b_res->flags);
> > >  	min_align = calculate_head_align(aligns, max_order);
> > >  	min_align = max(min_align, win_align);
> > > -	size0 = calculate_memsize(size, min_size, 0, 0, old_size, win_align);
> > > +	size0 = calculate_memsize(size, min_size, 0, 0, win_align);
> > >  
> > >  	if (size0) {
> > >  		resource_set_range(b_res, min_align, size0);
> > > @@ -1378,7 +1373,7 @@ static void pbus_size_mem(struct pci_bus *bus, unsigned long type,
> > >  	if (realloc_head && (add_size > 0 || children_add_size > 0)) {
> > >  		add_align = max(min_align, add_align);
> > >  		size1 = calculate_memsize(size, min_size, add_size, children_add_size,
> > > -					  old_size, win_align);
> > > +					  win_align);
> > >  	}
> > >  
> > >  	if (!size0 && !size1) {
> > > -- 
> > > 2.39.5
> > > 
> 

  reply	other threads:[~2026-01-27 11:39 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-12-19 17:40 [PATCH 00/23] PCI: Resource code fixes (supercedes earlier series) & cleanups Ilpo Järvinen
2025-12-19 17:40 ` [PATCH 01/23] PCI: Fix bridge window alignment with optional resources Ilpo Järvinen
2025-12-19 17:40 ` [PATCH 02/23] PCI: Rewrite bridge window head alignment function Ilpo Järvinen
2026-01-26 22:17   ` Bjorn Helgaas
2026-01-27 11:22     ` Ilpo Järvinen
2026-01-27 22:39       ` Bjorn Helgaas
2025-12-19 17:40 ` [PATCH 03/23] PCI: Stop over-estimating bridge window size Ilpo Järvinen
2026-03-05 15:13   ` Guenter Roeck
2026-03-05 16:28     ` Ilpo Järvinen
2025-12-19 17:40 ` [PATCH 04/23] resource: Increase MAX_IORES_LEVEL to 8 Ilpo Järvinen
2025-12-19 17:40 ` [PATCH 05/23] PCI: Remove old_size limit from bridge window sizing Ilpo Järvinen
2026-01-26 17:16   ` Bjorn Helgaas
2026-01-26 20:09     ` Bjorn Helgaas
2026-01-27 11:39       ` Ilpo Järvinen [this message]
2026-01-27 22:42         ` Bjorn Helgaas
2026-01-27 10:16     ` Ilpo Järvinen
2025-12-19 17:40 ` [PATCH 06/23] PCI: Push realloc check into pbus_size_mem() Ilpo Järvinen
2025-12-19 17:40 ` [PATCH 07/23] PCI: Pass bridge window resource to pbus_size_mem() Ilpo Järvinen
2025-12-19 17:40 ` [PATCH 08/23] PCI: Use res_to_dev_res() in reassign_resources_sorted() Ilpo Järvinen
2025-12-19 17:40 ` [PATCH 09/23] PCI: Fetch dev_res to local var in __assign_resources_sorted() Ilpo Järvinen
2025-12-19 17:40 ` [PATCH 10/23] PCI: Add pci_resource_is_bridge_win() Ilpo Järvinen
2025-12-19 17:40 ` [PATCH 11/23] PCI: Log reset and restore of resources Ilpo Järvinen
2025-12-19 17:40 ` [PATCH 12/23] PCI: Check invalid align earlier in pbus_size_mem() Ilpo Järvinen
2025-12-19 17:40 ` [PATCH 13/23] PCI: Add pbus_mem_size_optional() to handle optional sizes Ilpo Järvinen
2025-12-19 17:40 ` [PATCH 14/23] resource: Mark res given to resource_assigned() as const Ilpo Järvinen
2025-12-19 17:47   ` Ilpo Järvinen
2025-12-19 17:40 ` [PATCH 15/23] PCI: Use resource_assigned() in setup-bus.c algorithm Ilpo Järvinen
2025-12-19 17:40 ` [PATCH 16/23] PCI: Properly prefix struct pci_dev_resource handling functions Ilpo Järvinen
2025-12-19 17:40 ` [PATCH 17/23] PCI: Separate cardbus setup & build it only with CONFIG_CARDBUS Ilpo Järvinen
2025-12-19 17:40 ` [PATCH 18/23] PCI: Handle CardBus specific params in setup-cardbus.c Ilpo Järvinen
2025-12-19 17:40 ` [PATCH 19/23] PCI: Use scnprintf() instead of sprintf() Ilpo Järvinen
2025-12-19 17:40 ` [PATCH 20/23] PCI: Add Bus Number + Secondary Latency Timer as dword fields Ilpo Järvinen
2025-12-19 17:40 ` [PATCH 21/23] PCI: Convert to use Bus Number field defines Ilpo Järvinen
2025-12-19 17:40 ` [PATCH 22/23] PCI: Add pbus_validate_busn() for Bus Number validation Ilpo Järvinen
2025-12-19 17:40 ` [PATCH 23/23] PCI: Move scanbus bridge scanning to setup-cardbus.c Ilpo Järvinen
2026-01-26 17:39 ` [PATCH 00/23] PCI: Resource code fixes (supercedes earlier series) & cleanups Bjorn Helgaas

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