From: sashiko-bot@kernel.org
To: "Pavel Popov" <pavel.e.popov@intel.com>
Cc: linux-pci@vger.kernel.org
Subject: Re: [PATCH 1/2] PCI/P2PDMA: Allow P2PDMA in VMware guests on Intel hosts
Date: Fri, 09 Oct 2026 15:46:31 +0000 [thread overview]
Message-ID: <sashiko-outbox-165794@kernel.org> (raw)
In-Reply-To: <20261009154034.82321-2-pavel.e.popov@intel.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] x86/cpu: non-monotonic VFM comparison incorrectly matches older Intel architectures
--
commit 057eed2a36be8e0dd1417073d5f1e8a59caa5ea8
Author: Pavel Popov <pavel.e.popov@intel.com>
PCI/P2PDMA: Allow P2PDMA in VMware guests on Intel hosts
This commit allows Peer-to-Peer DMA (P2PDMA) to function in VMware guests on
Intel hosts starting with Skylake-SP. It bypasses the standard host bridge
whitelist checks which fail in VMware guests due to passthrough devices
appearing on virtual root buses without host bridge devices.
> diff --git a/drivers/pci/p2pdma.c b/drivers/pci/p2pdma.c
> index 9334eb314663e..d96f44d0738a8 100644
> --- a/drivers/pci/p2pdma.c
> +++ b/drivers/pci/p2pdma.c
[ ... ]
> @@ -532,6 +538,19 @@ static bool cpu_supports_p2pdma(void)
> return false;
> }
>
> +static bool hypervisor_supports_p2pdma(void)
> +{
> +#ifdef CONFIG_X86
> + /* Hypervisor hides host topology, allow p2pdma on Skylake and newer */
> + if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL &&
> + boot_cpu_data.x86_vfm >= INTEL_SKYLAKE_X &&
[Severity: High]
Does this logic correctly identify Skylake and newer CPUs?
Intel's Family 6 model numbers (VFM) are not monotonically or chronologically
increasing. INTEL_SKYLAKE_X is Model 0x55. Older, unsupported processors like
Broadwell-D (0x56) and Atom Goldmont (0x5C) have numerically higher VFM values
and will erroneously pass this check. Conversely, some Skylake processors like
Skylake-L (0x4E) have lower values and will be incorrectly excluded.
Passing this check on older, unsupported architectures could result in
unsupported P2PDMA transactions that trigger PCI bus master aborts or
Uncorrectable Errors (AERs).
Would it be better to use x86_match_cpu() with an explicit list of supported
VFMs rather than a numeric threshold comparison?
> + hypervisor_is_type(X86_HYPER_VMWARE))
> + return true;
> +#endif
> +
> + return false;
> +}
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261009154034.82321-1-pavel.e.popov@intel.com?part=1
next prev parent reply other threads:[~2026-10-09 15:46 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-09 15:40 [PATCH 0/2] PCI/P2PDMA: Allow P2PDMA in VMware and Hyper-V guests on Intel hosts Pavel Popov
2026-10-09 15:40 ` [PATCH 1/2] PCI/P2PDMA: Allow P2PDMA in VMware " Pavel Popov
2026-10-09 15:46 ` sashiko-bot [this message]
2026-10-09 16:12 ` Popov, Pavel E
2026-10-09 16:38 ` Logan Gunthorpe
2026-10-09 16:49 ` Popov, Pavel E
2026-10-09 15:40 ` [PATCH 2/2] PCI/P2PDMA: Allow P2PDMA in Hyper-V " Pavel Popov
2026-10-09 15:47 ` sashiko-bot
2026-10-09 16:15 ` Popov, Pavel E
2026-10-09 16:58 ` [PATCH 0/2] PCI/P2PDMA: Allow P2PDMA in VMware and " Bjorn Helgaas
2026-10-09 18:08 ` Leon Romanovsky
2026-10-09 18:21 ` Popov, Pavel E
2026-10-09 18:49 ` Leon Romanovsky
2026-10-09 19:13 ` Popov, Pavel E
2026-10-11 5:47 ` Leon Romanovsky
2026-10-09 19:12 ` Bjorn Helgaas
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