From: sashiko-bot@kernel.org
To: "Manikanta Maddireddy" <mmaddireddy@nvidia.com>,
linux-pci@vger.kernel.org
Subject: Re: [PATCH v2 2/5] PCI: tegra194: Use FIELD_*() for register fields
Date: Fri, 16 Oct 2026 07:51:18 +0000 [thread overview]
Message-ID: <sashiko-outbox-173973@kernel.org> (raw)
In-Reply-To: <20261016074026.564302-3-mmaddireddy@nvidia.com>
> Several Tegra194 APPL and DesignWare register fields are programmed
> with open-coded shifts, which makes the register programming more
> verbose than necessary.
>
> Use FIELD_PREP(), FIELD_MODIFY() and FIELD_GET() at the Tegra call
> sites where values are shifted into fields. The LTSSM state constants
> are converted from pre-shifted register values to unshifted field
> values for FIELD_GET().
>
> Suggested-by: Bjorn Helgaas <bhelgaas@google.com>
> Link: https://lore.kernel.org/r/20260515070753.3852840-2-mmaddireddy@nvidia.com
> Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
Sashiko has reviewed this patch and found no issues. It looks great!
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261016074026.564302-1-mmaddireddy@nvidia.com?part=2
next prev parent reply other threads:[~2026-10-16 7:51 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-16 7:40 [PATCH v2 0/5] PCI: dwc: Clean up RAS-DES and register field handling Manikanta Maddireddy
2026-10-16 7:40 ` [PATCH v2 1/5] PCI: dwc: Add RAS event counter field masks Manikanta Maddireddy
2026-10-16 7:45 ` sashiko-bot
2026-10-16 7:40 ` [PATCH v2 2/5] PCI: tegra194: Use FIELD_*() for register fields Manikanta Maddireddy
2026-10-16 7:51 ` sashiko-bot [this message]
2026-10-16 7:40 ` [PATCH v2 3/5] PCI: dwc: Drop unused shift macros Manikanta Maddireddy
2026-10-16 7:48 ` sashiko-bot
2026-10-16 7:40 ` [PATCH v2 4/5] PCI: tegra194: Use standard RAS event selector mask Manikanta Maddireddy
2026-10-16 7:48 ` sashiko-bot
2026-10-16 7:40 ` [PATCH v2 5/5] PCI: dwc: Consolidate RAS-DES event counter fields Manikanta Maddireddy
2026-10-16 7:48 ` sashiko-bot
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