Re: [PATCH v2] PCI: pciehp: Add PLX 8600/8700 quirk for missing Command Completed events

[sashiko-bot@kernel.org]

> All PLX PEX 8600- and 8700-series data books say the Command Completed bit
> is set only after the Hot Plug Controller completes a command that changes
> the Attention Indicator Control, Power Indicator Control, Power Controller
> Control, or Electromechanical Interlock Control fields.  It is not set
> after writes that only change the Presence Detect Changed Enable or Command
> Completed Interrupt Enable bits.
> 
> Consequently, pciehp waits for Command Completed after changing these
> notification Enable bits and logs a timeout, for example:
> 
>   pcieport 0000:90:02.0: pciehp: Timeout on hotplug command 0x07c0
>   (issued 2032 msec ago)
> 
> Like the controllers already handled by quirk_cmd_compl(), these PLX
> switches report completion only when the same four Control fields change
> and fail to report completion for notification Enable-only writes.
> 
> Add only the PLX PEX 8600- and 8700-series switches on which this fix was
> tested to quirk_cmd_compl().  This makes pciehp mark Enable-only writes
> complete immediately while continuing to wait for commands that change
> Control fields.
> 
> Signed-off-by: Yury Murashka <yurypm@arista.com>

Sashiko has reviewed this patch and found no issues. It looks great!

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Sashiko AI review · https://sashiko.dev/#/patchset/20261016105426.1366992-1-yurypm@arista.com?part=1