From: sashiko-bot@kernel.org
To: "Manikanta Maddireddy" <mmaddireddy@nvidia.com>,
linux-pci@vger.kernel.org
Subject: Re: [PATCH v1] PCI: endpoint: Skip upper halves of 64-bit BARs during search
Date: Wed, 21 Oct 2026 08:13:10 +0000 [thread overview]
Message-ID: <sashiko-outbox-179946@kernel.org> (raw)
In-Reply-To: <20261021080644.1346549-1-mmaddireddy@nvidia.com>
> pci_epc_get_next_free_bar() skips the upper half of a 64-bit BAR only
> when it is the starting BAR. If the search subsequently passes a
> reserved or disabled 64-bit BAR, it can return its upper half as an
> independent BAR because that slot has a default programmable descriptor.
>
> For example, Tegra exposes a programmable 64-bit BAR0 and reserved
> 64-bit BAR2 and BAR4. A search starting at BAR1 skips BAR1 and BAR2,
> then incorrectly returns BAR3. The next search can similarly return
> BAR5, causing the EPF test driver to allocate and program BARs that
> belong to the reserved hardware windows.
>
> Check each candidate's preceding descriptor inside the search loop so
> upper halves are skipped throughout the search. With the Tegra layout,
> BAR0 is the only available BAR and subsequent searches return NO_BAR.
>
> Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
Sashiko has reviewed this patch and found no issues.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20261021080644.1346549-1-mmaddireddy@nvidia.com?part=1
next prev parent reply other threads:[~2026-10-21 8:13 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-21 8:06 [PATCH v1] PCI: endpoint: Skip upper halves of 64-bit BARs during search Manikanta Maddireddy
2026-10-21 8:13 ` sashiko-bot [this message]
2026-10-21 10:45 ` Niklas Cassel
2026-10-21 14:25 ` Niklas Cassel
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