Re: [PATCH net V2 2/4] net/mlx5: Lag, limit aggregated TX speed by PCIe bandwidth

[sashiko-bot@kernel.org]

> From: Or Har-Toov <ohartoov@nvidia.com>
> 
> FW initializes max_tx_speed to the minimum of the port speed and the
> PCI bandwidth. Modifying it with a value computed by different rules
> changes the meaning of the field rather than updating it.
> 
> Limit the aggregated LAG TX speed by the PCIe bandwidth. Clamping each
> uplink separately and then summing could let the aggregate reach a
> multiple of the link's real bandwidth, so clamp the sum once instead,
> counting only the ports that contribute to it.
> 
> This assumes the bonded PFs share a single PCIe link, which holds when
> they are functions of the same device. In Socket Direct, each port spans
> multiple mdevs on separate PCIe links, so the PCIe budget for that port
> is the sum of its mdevs' PCIe bandwidths. Where Socket Direct ports do
> [ ... ]
> Fixes: 50f1d188c580 ("net/mlx5: Propagate LAG effective max_tx_speed to vports")
> Signed-off-by: Or Har-Toov <ohartoov@nvidia.com>
> Reviewed-by: Mark Bloch <mbloch@nvidia.com>
> Reviewed-by: Shay Drori <shayd@nvidia.com>
> Signed-off-by: Tariq Toukan <tariqt@nvidia.com>

Sashiko has reviewed this patch and found no issues.

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