Re: [PATCH v7 04/10] PCI: dw-rockchip: Add helper function for enhanced LTSSM control mode

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] PCI: dw-rockchip: missed LTSSM helper in rockchip_pcie_rc_reset_root_port()
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commit 01b1475be69dbc97dabfa0df29b029fb455894d6
Author: Sebastian Reichel <sebastian.reichel@collabora.com>

PCI: dw-rockchip: Add helper function for enhanced LTSSM control mode

This commit introduces a rockchip_pcie_enable_enhanced_ltssm_control_mode()
helper function to deduplicate setting up the enhanced LTSSM mode in
rockchip_pcie_configure_rc() and rockchip_pcie_configure_ep().

> diff --git a/drivers/pci/controller/dwc/pcie-dw-rockchip.c b/drivers/pci/controller/dwc/pcie-dw-rockchip.c
> index a3b0fb918479f..7645b0895bf91 100644
> --- a/drivers/pci/controller/dwc/pcie-dw-rockchip.c
> +++ b/drivers/pci/controller/dwc/pcie-dw-rockchip.c
> @@ -683,6 +683,18 @@ static irqreturn_t rockchip_pcie_ep_sys_irq_thread(int irq, void *arg)
>  	return IRQ_HANDLED;
>  }
>  
> +static void rockchip_pcie_enable_enhanced_ltssm_control_mode(struct rockchip_pcie *rockchip,
> +							     bool delay_link_training_after_reset)
> +{
> +	u32 val;
> +
> +	/* Enable the enhanced control mode of signal app_ltssm_enable */
> +	val = FIELD_PREP_WM16(PCIE_LTSSM_ENABLE_ENHANCE, 1);
> +	if (delay_link_training_after_reset)
> +		val |= FIELD_PREP_WM16(PCIE_LTSSM_APP_DLY2_EN, 1);
> +	rockchip_pcie_writel_apb(rockchip, val, PCIE_CLIENT_HOT_RESET_CTRL);
> +}
> +
>  static int rockchip_pcie_configure_rc(struct platform_device *pdev,
>  				      struct rockchip_pcie *rockchip)
>  {
> @@ -706,9 +718,7 @@ static int rockchip_pcie_configure_rc(struct platform_device *pdev,
>  		return ret;
>  	}
>  
> -	/* LTSSM enable control mode */
> -	val = FIELD_PREP_WM16(PCIE_LTSSM_ENABLE_ENHANCE, 1);
> -	rockchip_pcie_writel_apb(rockchip, val, PCIE_CLIENT_HOT_RESET_CTRL);
> +	rockchip_pcie_enable_enhanced_ltssm_control_mode(rockchip, false);

[Severity: Low]
As reported by Sashiko on v6 [1], rockchip_pcie_rc_reset_root_port() in
drivers/pci/controller/dwc/pcie-dw-rockchip.c still open-codes the same
PCIE_CLIENT_HOT_RESET_CTRL write:

	/* LTSSM enable control mode */
	val = FIELD_PREP_WM16(PCIE_LTSSM_ENABLE_ENHANCE, 1);
	rockchip_pcie_writel_apb(rockchip, val, PCIE_CLIENT_HOT_RESET_CTRL);

Should rockchip_pcie_rc_reset_root_port() also be converted to call
rockchip_pcie_enable_enhanced_ltssm_control_mode(rockchip, false)?

[1] https://lore.kernel.org/r/20260908-rockchip-pcie-system-suspend-v6-4-fbabcca9921b@collabora.com

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Sashiko AI review · https://sashiko.dev/#/patchset/20261104-rockchip-pcie-system-suspend-v7-0-6ae6875939a2@collabora.com?part=4