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([2a01:e0a:1:6960:9f76:b012:ddc2:11de]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3632d8562a1sm3517542f8f.2.2024.06.19.14.25.56 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 19 Jun 2024 14:25:57 -0700 (PDT) Message-ID: <0021f5f2-67c5-4b20-939d-48c9c1c60cdb@gmail.com> Date: Wed, 19 Jun 2024 23:25:56 +0200 Precedence: bulk X-Mailing-List: linux-perf-users@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 0/9] Add CPU-type to topology Content-Language: en-US To: srinivas pandruvada , Pawan Gupta Cc: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, daniel.sneddon@linux.intel.com, tony.luck@intel.com, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, linux-perf-users@vger.kernel.org, Josh Poimboeuf , "Rafael J. Wysocki" , Ricardo Neri , "Liang, Kan" , Andrew Cooper References: <20240617-add-cpu-type-v1-0-b88998c01e76@linux.intel.com> <8d757ea3-87a3-4663-ac76-66b04e33e6b3@gmail.com> <20240619015315.3ei5f6rovzdnxovo@desk> From: Brice Goglin In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Le 19/06/2024 à 12:34, srinivas pandruvada a écrit : > On Tue, 2024-06-18 at 18:53 -0700, Pawan Gupta wrote: >> On Tue, Jun 18, 2024 at 02:49:10PM +0200, Brice Goglin wrote: >>> Le 17/06/2024 à 11:11, Pawan Gupta a écrit : >>>> Hi, >>>> >>>> This series adds support for CPU-type (CPUID.1A.EAX[31-24] on >>>> Intel) to >>>> differentiate between hybrid variants P+E, P-only, E-only that >>>> share the >>>> same Family/Model/Stepping. One of the use case for CPU-type is >>>> the >>>> affected CPU table for CPU vulnerabilities, which can now use the >>>> CPU-type >>>> to filter the unaffected variants. >>>> >>>> * Patch 1 adds cpu-type to CPU topology structure and introduces >>>>    topology_cpu_type() to get the CPU-type. >>>> >>>> * Patch 2-4 replaces usages of get_this_hybrid_cpu_type() with >>>>    topology_cpu_type(). >>>> >>>> * Patch 5-7 Updates CPU-matching infrastructure to use CPU-type. >>>> >>>> * Patch 8 cleans up the affected CPU list. >>>> >>>> * Patch 9 uses the CPU-type to exclude P-only parts from the RFDS >>>> affected >>>>    list. >>> >>> Hello >>> >>> Is there still a plan to expose this info in sysfs? >> Sure, if it helps userspace. >> >>> Userspace currently uses frequencies to guess which cores are E or >>> P. >>> Intel sent some patches several years ago [1], but they got >>> abandoned >>> nowhere as far as I know. There was also some discussion about >>> using a >>> "capacity" field like ARM does, but IIRC Intel didn't like the idea >>> in >>> the end. >> There can be many ways to expose this information in sysfs. Like this >> ... >> >>> [1] https://lkml.org/lkml/2020/10/2/1208 >> ... exposes /sys/devices/system/cpu/types which, in hybrid parts, >> creates a >> subdirectory for each type of CPU. Each subdirectory contains a CPU >> list >> and a CPU map that user space can query. >> >> The other way is to expose the CPU-type in a file: >> >>         /sys/devices/system/cpu/cpuN/type >> >> that could return the CPU-type of the CPU N. Is there a preference? > But you still have to look at frequency or caches as there are Low > power E-cores which will have same type but different capabilities. Good point. From this patch series, I understand that the current kernel side doesn't care about these different E-cores. However it might be good to expose them as different cpu-types (or better name) to userspace ? Something like type 0 = P-core, 1 = normal E-core, 2 = low power E-core ? Brice