From: Ravi Bangoria <ravi.bangoria@amd.com>
To: peterz@infradead.org
Cc: mingo@kernel.org, eranian@google.com, kan.liang@linux.intel.com,
jolsa@kernel.org, irogers@google.com, adrian.hunter@intel.com,
leo.yan@linaro.org, kjain@linux.ibm.com,
linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org,
sandipan.das@amd.com, ananth.narayan@amd.com,
santosh.shukla@amd.com, Namhyung Kim <namhyung@kernel.org>,
acme@kernel.org, Ravi Bangoria <ravi.bangoria@amd.com>
Subject: Re: [PATCH v3 0/9] perf/mem: AMD IBS and generic tools improvements
Date: Fri, 30 Jun 2023 12:05:28 +0530 [thread overview]
Message-ID: <00865c8f-32eb-157f-ce05-2d5d0218559e@amd.com> (raw)
In-Reply-To: <cbca803c-c9b2-f851-6cf1-f9ed0223de13@amd.com>
On 29-May-23 9:35 AM, Ravi Bangoria wrote:
> On 16-May-23 8:15 AM, Ravi Bangoria wrote:
>> On 10-Apr-23 7:53 AM, Ravi Bangoria wrote:
>>> On 08-Apr-23 3:14 AM, Namhyung Kim wrote:
>>>> Hi Ravi,
>>>>
>>>> On Fri, Apr 7, 2023 at 4:25 AM Ravi Bangoria <ravi.bangoria@amd.com> wrote:
>>>>>
>>>>> Kernel IBS driver wasn't using new PERF_MEM_* APIs due to some of its
>>>>> limitations. Mainly:
>>>>>
>>>>> 1. mem_lvl_num doesn't allow setting multiple sources whereas old API
>>>>> allows it. Setting multiple data sources is useful because IBS on
>>>>> pre-zen4 uarch doesn't provide fine granular DataSrc details (there
>>>>> is only one such DataSrc(2h) though).
>>>>> 2. perf mem sorting logic (sort__lvl_cmp()) ignores mem_lvl_num. perf
>>>>> c2c (c2c_decode_stats()) does not use mem_lvl_num at all. perf mem
>>>>> prints mem_lvl and mem_lvl_num both if both are set, which is ugly.
>>>>>
>>>>> Set mem_lvl_num, mem_remote and mem_hops for data_src via IBS. Handle
>>>>> first issue using mem_lvl_num = ANY_CACHE | HOPS_0. In addition to
>>>>> setting new API fields, convert all individual field assignments to
>>>>> compile time wrapper macros built using PERF_MEM_S(). Also convert
>>>>> DataSrc conditional code to array lookups.
>>>>>
>>>>> Interpretation of perf_mem_data_src by perf_mem__lvl_scnprintf() was
>>>>> non-intuitive. Make it sane.
>>>>
>>>> Looks good, but I think you need to split kernel and user patches.
>>>
>>> Patch #1 to #3 are kernel changes. Patch #4 to #9 are userspace changes.
>>> Arnaldo, Peter, please let me know if you wants to split the series and
>>> resend.
>>
>> Hi Peter, tools/ patches are already upstream. Can you please pick up
>> kernel changes.
>
> Gentle ping, Peter!
Hello Peter, this is pending from long time. Can you please consider taking
it. Please let me know if you want me to resend the patches.
Thanks,
Ravi
prev parent reply other threads:[~2023-06-30 6:37 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-07 11:24 [PATCH v3 0/9] perf/mem: AMD IBS and generic tools improvements Ravi Bangoria
2023-04-07 11:24 ` [PATCH v3 1/9] perf/mem: Introduce PERF_MEM_LVLNUM_UNC Ravi Bangoria
2023-04-07 11:24 ` [PATCH v3 2/9] perf/mem: Add PERF_MEM_LVLNUM_NA to PERF_MEM_NA Ravi Bangoria
2023-04-07 11:24 ` [PATCH v3 3/9] perf/x86/ibs: Set mem_lvl_num, mem_remote and mem_hops for data_src Ravi Bangoria
2023-04-07 11:24 ` [PATCH v3 4/9] perf headers: Sync uapi/linux/perf_event.h Ravi Bangoria
2023-04-07 11:24 ` [PATCH v3 5/9] perf mem: Add PERF_MEM_LVLNUM_NA to PERF_MEM_DATA_SRC_NONE Ravi Bangoria
2023-04-07 11:24 ` [PATCH v3 6/9] perf mem: Add support for printing PERF_MEM_LVLNUM_UNC Ravi Bangoria
2023-04-07 11:24 ` [PATCH v3 7/9] perf mem: Refactor perf_mem__lvl_scnprintf() Ravi Bangoria
2023-04-07 11:24 ` [PATCH v3 8/9] perf mem: Increase HISTC_MEM_LVL column size to 39 chars Ravi Bangoria
2023-04-07 11:24 ` [PATCH v3 9/9] perf script ibs: Change bit description according to latest PPR Ravi Bangoria
2023-04-07 21:44 ` [PATCH v3 0/9] perf/mem: AMD IBS and generic tools improvements Namhyung Kim
2023-04-10 2:23 ` Ravi Bangoria
2023-04-10 15:15 ` Arnaldo Carvalho de Melo
2023-04-10 22:31 ` Arnaldo Carvalho de Melo
2023-05-16 2:45 ` Ravi Bangoria
2023-05-29 4:05 ` Ravi Bangoria
2023-06-30 6:35 ` Ravi Bangoria [this message]
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