From: James Clark <james.clark@arm.com>
To: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
Peter Zijlstra <peterz@infradead.org>,
Ingo Molnar <mingo@redhat.com>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
Namhyung Kim <namhyung@kernel.org>,
Mark Rutland <mark.rutland@arm.com>, Jiri Olsa <jolsa@kernel.org>,
Ian Rogers <irogers@google.com>,
Adrian Hunter <adrian.hunter@intel.com>,
John Garry <john.g.garry@oracle.com>,
Will Deacon <will@kernel.org>, Leo Yan <leo.yan@linux.dev>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
linux-stm32@st-md-mailman.stormreply.com,
linux-perf-users@vger.kernel.org,
gankulkarni@os.amperecomputing.com,
scclevenger@os.amperecomputing.com, coresight@lists.linaro.org,
mike.leach@linaro.org
Subject: Re: [PATCH 16/17] coresight: Re-emit trace IDs when the sink changes in per-thread mode
Date: Fri, 17 May 2024 12:01:02 +0200 [thread overview]
Message-ID: <02bec885-5fd7-42dd-b85c-9547be7d3211@arm.com> (raw)
In-Reply-To: <0d433917-f638-4ca6-ba6a-1d5e85895024@arm.com>
On 07/05/2024 13:05, Suzuki K Poulose wrote:
> On 29/04/2024 16:22, James Clark wrote:
>> In per-cpu mode there are multiple aux buffers and each one has a
>> fixed sink, so the hw ID mappings which only need to be emitted once
>> for each buffer, even with the new per-sink trace ID pools.
>>
>> But in per-thread mode there is only a single buffer which can be
>> written to from any sink with now potentially overlapping trace IDs, so
>> hw ID mappings need to be re-emitted every time the sink changes.
>>
>> This will require a change in Perf to track this so it knows which
>> decode tree to use for each segment of the buffer. In theory it's also
>> possible to look at the CPU ID on the AUX records, but this is more
>> consistent with the existing system, and allows for correct decode using
>> either mechanism.
>>
>> Signed-off-by: James Clark <james.clark@arm.com>
>> ---
>> drivers/hwtracing/coresight/coresight-etm-perf.c | 14 ++++++++++++++
>> drivers/hwtracing/coresight/coresight-etm-perf.h | 2 ++
>> 2 files changed, 16 insertions(+)
>>
>> diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c
>> b/drivers/hwtracing/coresight/coresight-etm-perf.c
>> index f07173aa4d66..08f3958f9367 100644
>> --- a/drivers/hwtracing/coresight/coresight-etm-perf.c
>> +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c
>> @@ -499,6 +499,20 @@ static void etm_event_start(struct perf_event
>> *event, int flags)
>> &sink->perf_id_map))
>> goto fail_disable_path;
>> + /*
>> + * In per-cpu mode there are multiple aux buffers and each one has a
>> + * fixed sink, so the hw ID mappings which only need to be
>> emitted once
>> + * for each buffer.
>> + *
>> + * But in per-thread mode there is only a single buffer which can be
>> + * written to from any sink with potentially overlapping trace
>> IDs, so
>> + * hw ID mappings need to be re-emitted every time the sink changes.
>> + */
>> + if (event->cpu == -1 && event_data->last_sink_hwid != sink) {
>> + cpumask_clear(&event_data->aux_hwid_done);
>> + event_data->last_sink_hwid = sink;
>> + }
>> +
>
> With the traceid caching in the event_data per-cpu , we could avoid this
> step ?
>
> Suzuki
>
>
I don't think so, this is to inform the tool that the mappings have
changed if the tool doesn't want to follow switch events.
Unless I'm missing something, moving where the trace ids are stored
doesn't mean that they will be re-sent when the mappings change?
next prev parent reply other threads:[~2024-05-17 10:01 UTC|newest]
Thread overview: 51+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-29 15:21 [PATCH 00/17] coresight: Use per-sink trace ID maps for Perf sessions James Clark
2024-04-29 15:21 ` [PATCH 01/17] perf cs-etm: Print error for new PERF_RECORD_AUX_OUTPUT_HW_ID versions James Clark
2024-05-07 3:47 ` Anshuman Khandual
2024-05-07 10:06 ` James Clark
2024-05-07 10:57 ` Anshuman Khandual
2024-05-07 14:54 ` Arnaldo Carvalho de Melo
2024-04-29 15:21 ` [PATCH 02/17] perf auxtrace: Allow number of queues to be specified James Clark
2024-04-30 6:36 ` Adrian Hunter
2024-05-07 4:26 ` Anshuman Khandual
2024-04-29 15:21 ` [PATCH 03/17] perf: cs-etm: Create decoders after both AUX and HW_ID search passes James Clark
2024-04-29 15:21 ` [PATCH 04/17] perf: cs-etm: Allocate queues for all CPUs James Clark
2024-04-29 15:21 ` [PATCH 05/17] perf: cs-etm: Move traceid_list to each queue James Clark
2024-04-29 15:21 ` [PATCH 06/17] perf: cs-etm: Create decoders based on the trace ID mappings James Clark
2024-04-29 15:21 ` [PATCH 07/17] perf: cs-etm: Support version 0.1 of HW_ID packets James Clark
2024-04-29 15:21 ` [PATCH 08/17] coresight: Remove unused stubs James Clark
2024-05-01 11:06 ` Mike Leach
2024-05-07 4:15 ` Anshuman Khandual
2024-04-29 15:21 ` [PATCH 09/17] coresight: Clarify comments around the PID of the sink owner James Clark
2024-05-01 11:07 ` Mike Leach
2024-05-07 4:25 ` Anshuman Khandual
2024-04-29 15:21 ` [PATCH 10/17] coresight: Move struct coresight_trace_id_map to common header James Clark
2024-05-01 11:11 ` Mike Leach
2024-05-07 5:50 ` Anshuman Khandual
2024-04-29 15:21 ` [PATCH 11/17] coresight: Expose map argument in trace ID API James Clark
2024-05-01 10:31 ` Mike Leach
2024-05-17 10:09 ` James Clark
2024-05-07 6:00 ` Anshuman Khandual
2024-04-29 15:21 ` [PATCH 11/17] coresight: Expose map arugment " James Clark
2024-04-29 15:30 ` James Clark
2024-04-29 15:21 ` [PATCH 12/17] coresight: Make CPU id map a property of a trace ID map James Clark
2024-05-07 6:22 ` Anshuman Khandual
2024-05-07 9:57 ` James Clark
2024-04-29 15:21 ` [PATCH 13/17] coresight: Pass trace ID map into source enable James Clark
2024-05-07 6:46 ` Anshuman Khandual
2024-05-07 10:49 ` Suzuki K Poulose
2024-04-29 15:22 ` [PATCH 14/17] coresight: Use per-sink trace ID maps for Perf sessions James Clark
2024-05-03 9:43 ` Mike Leach
2024-05-03 14:31 ` James Clark
2024-05-07 10:52 ` Suzuki K Poulose
2024-05-17 10:07 ` James Clark
2024-04-29 15:22 ` [PATCH 15/17] coresight: Remove pending trace ID release mechanism James Clark
2024-04-29 15:22 ` [PATCH 16/17] coresight: Re-emit trace IDs when the sink changes in per-thread mode James Clark
2024-05-07 11:05 ` Suzuki K Poulose
2024-05-17 10:01 ` James Clark [this message]
2024-04-29 15:22 ` [PATCH 17/17] coresight: Emit HW_IDs for all ETMs that are using the sink James Clark
2024-05-03 12:40 ` [PATCH 00/17] coresight: Use per-sink trace ID maps for Perf sessions Mike Leach
2024-05-17 10:45 ` James Clark
2024-05-03 20:23 ` Arnaldo Carvalho de Melo
2024-05-07 10:01 ` James Clark
2024-05-07 14:59 ` Arnaldo Carvalho de Melo
2024-05-07 11:02 ` Ganapatrao Kulkarni
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=02bec885-5fd7-42dd-b85c-9547be7d3211@arm.com \
--to=james.clark@arm.com \
--cc=acme@kernel.org \
--cc=adrian.hunter@intel.com \
--cc=alexander.shishkin@linux.intel.com \
--cc=alexandre.torgue@foss.st.com \
--cc=coresight@lists.linaro.org \
--cc=gankulkarni@os.amperecomputing.com \
--cc=irogers@google.com \
--cc=john.g.garry@oracle.com \
--cc=jolsa@kernel.org \
--cc=leo.yan@linux.dev \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-perf-users@vger.kernel.org \
--cc=linux-stm32@st-md-mailman.stormreply.com \
--cc=mark.rutland@arm.com \
--cc=mcoquelin.stm32@gmail.com \
--cc=mike.leach@linaro.org \
--cc=mingo@redhat.com \
--cc=namhyung@kernel.org \
--cc=peterz@infradead.org \
--cc=scclevenger@os.amperecomputing.com \
--cc=suzuki.poulose@arm.com \
--cc=will@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).