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Mon, 29 Jul 2024 08:11:01 -0700 (PDT) Message-ID: <0f95d601-418f-4307-bcd1-5fcebac8018f@linux.intel.com> Date: Mon, 29 Jul 2024 11:10:59 -0400 Precedence: bulk X-Mailing-List: linux-perf-users@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] perf/x86: Fix smp_processor_id()-in-preemptible warnings To: Li Huafei , peterz@infradead.org, mingo@redhat.com Cc: acme@kernel.org, namhyung@kernel.org, mark.rutland@arm.com, alexander.shishkin@linux.intel.com, jolsa@kernel.org, irogers@google.com, adrian.hunter@intel.com, tglx@linutronix.de, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, ak@linux.intel.com, linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org References: <20240729220928.325449-1-lihuafei1@huawei.com> Content-Language: en-US From: "Liang, Kan" In-Reply-To: <20240729220928.325449-1-lihuafei1@huawei.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 2024-07-29 6:09 p.m., Li Huafei wrote: > The following bug was triggered on a system built with > CONFIG_DEBUG_PREEMPT=y: > > # echo p > /proc/sysrq-trigger > > BUG: using smp_processor_id() in preemptible [00000000] code: sh/117 > caller is perf_event_print_debug+0x1a/0x4c0 > CPU: 3 UID: 0 PID: 117 Comm: sh Not tainted 6.11.0-rc1 #109 > Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS 1.13.0-1ubuntu1.1 04/01/2014 > Call Trace: > > dump_stack_lvl+0x4f/0x60 > check_preemption_disabled+0xc8/0xd0 > perf_event_print_debug+0x1a/0x4c0 > __handle_sysrq+0x140/0x180 > write_sysrq_trigger+0x61/0x70 > proc_reg_write+0x4e/0x70 > vfs_write+0xd0/0x430 > ? handle_mm_fault+0xc8/0x240 > ksys_write+0x9c/0xd0 > do_syscall_64+0x96/0x190 > entry_SYSCALL_64_after_hwframe+0x4b/0x53 > > This is because the commit d4b294bf84db ("perf/x86: Hybrid PMU support > for counters") took smp_processor_id() outside the irq critical section. > If a preemption occurs in perf_event_print_debug() and the task is > migrated to another cpu, we may get incorrect pmu debug information. > Move smp_processor_id() back inside the irq critical section to fix this > issue. > > Fixes: d4b294bf84db ("perf/x86: Hybrid PMU support for counters") > Signed-off-by: Li Huafei Looks good to me. Reviewed-by: Kan Liang Thanks, Kan > --- > v2: > - "cpu" and "idx" are defined together. > - Use guard(irqsave)() instead of local_irq_save{restore}() to avoid > forgetting to restore irq when returning early. > --- > arch/x86/events/core.c | 22 ++++++++++++---------- > 1 file changed, 12 insertions(+), 10 deletions(-) > > diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c > index 12f2a0c14d33..2cadfdd8dd99 100644 > --- a/arch/x86/events/core.c > +++ b/arch/x86/events/core.c > @@ -1521,19 +1521,22 @@ void perf_event_print_debug(void) > { > u64 ctrl, status, overflow, pmc_ctrl, pmc_count, prev_left, fixed; > u64 pebs, debugctl; > - int cpu = smp_processor_id(); > - struct cpu_hw_events *cpuc = &per_cpu(cpu_hw_events, cpu); > - unsigned long *cntr_mask = hybrid(cpuc->pmu, cntr_mask); > - unsigned long *fixed_cntr_mask = hybrid(cpuc->pmu, fixed_cntr_mask); > - struct event_constraint *pebs_constraints = hybrid(cpuc->pmu, pebs_constraints); > - unsigned long flags; > - int idx; > + int cpu, idx; > + struct cpu_hw_events *cpuc; > + unsigned long *cntr_mask, *fixed_cntr_mask; > + struct event_constraint *pebs_constraints; > + > + guard(irqsave)(); > + > + cpu = smp_processor_id(); > + cpuc = &per_cpu(cpu_hw_events, cpu); > + cntr_mask = hybrid(cpuc->pmu, cntr_mask); > + fixed_cntr_mask = hybrid(cpuc->pmu, fixed_cntr_mask); > + pebs_constraints = hybrid(cpuc->pmu, pebs_constraints); > > if (!*(u64 *)cntr_mask) > return; > > - local_irq_save(flags); > - > if (x86_pmu.version >= 2) { > rdmsrl(MSR_CORE_PERF_GLOBAL_CTRL, ctrl); > rdmsrl(MSR_CORE_PERF_GLOBAL_STATUS, status); > @@ -1577,7 +1580,6 @@ void perf_event_print_debug(void) > pr_info("CPU#%d: fixed-PMC%d count: %016llx\n", > cpu, idx, pmc_count); > } > - local_irq_restore(flags); > } > > void x86_pmu_stop(struct perf_event *event, int flags)