From: "Rob Herring (Arm)" <robh@kernel.org>
To: Atish Patra <atishp@rivosinc.com>
Cc: Anup Patel <anup@brainfault.org>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Atish Patra <atishp@atishpatra.org>,
Ian Rogers <irogers@google.com>,
linux-arm-kernel@lists.infradead.org, weilin.wang@intel.com,
Paul Walmsley <paul.walmsley@sifive.com>,
kvm@vger.kernel.org, Jiri Olsa <jolsa@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
devicetree@vger.kernel.org, Ingo Molnar <mingo@redhat.com>,
linux-kernel@vger.kernel.org,
Arnaldo Carvalho de Melo <acme@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
linux-riscv@lists.infradead.org,
Peter Zijlstra <peterz@infradead.org>,
linux-perf-users@vger.kernel.org, Conor Dooley <conor@kernel.org>,
Will Deacon <will@kernel.org>,
kvm-riscv@lists.infradead.org,
Adrian Hunter <adrian.hunter@intel.com>,
Namhyung Kim <namhyung@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>
Subject: Re: [PATCH v4 04/21] dt-bindings: riscv: add Sxcsrind ISA extension description
Date: Wed, 19 Feb 2025 08:09:17 -0600 [thread overview]
Message-ID: <173997415655.2409606.4528669810137132252.robh@kernel.org> (raw)
In-Reply-To: <20250205-counter_delegation-v4-4-835cfa88e3b1@rivosinc.com>
On Wed, 05 Feb 2025 23:23:09 -0800, Atish Patra wrote:
> Add the S[m|s]csrind ISA extension description.
>
> Signed-off-by: Atish Patra <atishp@rivosinc.com>
> ---
> Documentation/devicetree/bindings/riscv/extensions.yaml | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
next prev parent reply other threads:[~2025-02-19 14:09 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-06 7:23 [PATCH v4 00/21] Add Counter delegation ISA extension support Atish Patra
2025-02-06 7:23 ` [PATCH v4 01/21] perf pmu-events: Add functions in jevent.py to parse counter and event info for hardware aware grouping Atish Patra
2025-02-06 7:23 ` [PATCH v4 02/21] RISC-V: Add Sxcsrind ISA extension CSR definitions Atish Patra
2025-02-07 7:57 ` Clément Léger
2025-02-06 7:23 ` [PATCH v4 03/21] RISC-V: Add Sxcsrind ISA extension definition and parsing Atish Patra
2025-02-06 7:23 ` [PATCH v4 04/21] dt-bindings: riscv: add Sxcsrind ISA extension description Atish Patra
2025-02-19 14:09 ` Rob Herring (Arm) [this message]
2025-02-06 7:23 ` [PATCH v4 05/21] RISC-V: Define indirect CSR access helpers Atish Patra
2025-02-06 7:23 ` [PATCH v4 06/21] RISC-V: Add Smcntrpmf extension parsing Atish Patra
2025-02-07 9:21 ` Clément Léger
2025-02-06 7:23 ` [PATCH v4 07/21] dt-bindings: riscv: add Smcntrpmf ISA extension description Atish Patra
2025-02-19 14:09 ` Rob Herring (Arm)
2025-02-06 7:23 ` [PATCH v4 08/21] RISC-V: Add Sscfg extension CSR definition Atish Patra
2025-02-07 9:30 ` Clément Léger
2025-02-27 0:03 ` Atish Kumar Patra
2025-02-06 7:23 ` [PATCH v4 09/21] RISC-V: Add Ssccfg ISA extension definition and parsing Atish Patra
2025-02-07 8:08 ` Clément Léger
2025-02-07 8:13 ` Clément Léger
2025-02-27 0:06 ` Atish Kumar Patra
2025-02-06 7:23 ` [PATCH v4 10/21] dt-bindings: riscv: add Counter delegation ISA extensions description Atish Patra
2025-02-06 8:39 ` Rob Herring (Arm)
2025-02-06 7:23 ` [PATCH v4 11/21] RISC-V: perf: Restructure the SBI PMU code Atish Patra
2025-02-06 10:51 ` Will Deacon
2025-02-07 16:53 ` Atish Kumar Patra
2025-02-07 9:59 ` Clément Léger
2025-02-06 7:23 ` [PATCH v4 12/21] RISC-V: perf: Modify the counter discovery mechanism Atish Patra
2025-02-07 10:29 ` Clément Léger
2025-02-27 1:05 ` Atish Kumar Patra
2025-02-06 7:23 ` [PATCH v4 13/21] RISC-V: perf: Add a mechanism to defined legacy event encoding Atish Patra
2025-02-06 7:23 ` [PATCH v4 14/21] RISC-V: perf: Implement supervisor counter delegation support Atish Patra
2025-02-06 7:23 ` [PATCH v4 15/21] RISC-V: perf: Skip PMU SBI extension when not implemented Atish Patra
2025-02-06 7:23 ` [PATCH v4 16/21] RISC-V: perf: Use config2/vendor table for event to counter mapping Atish Patra
2025-02-06 7:23 ` [PATCH v4 17/21] RISC-V: perf: Add legacy event encodings via sysfs Atish Patra
2025-02-06 7:23 ` [PATCH v4 18/21] RISC-V: perf: Add Qemu virt machine events Atish Patra
2025-02-06 7:23 ` [PATCH v4 19/21] tools/perf: Support event code for arch standard events Atish Patra
2025-02-06 7:23 ` [PATCH v4 20/21] tools/perf: Pass the Counter constraint values in the pmu events Atish Patra
2025-02-06 7:23 ` [PATCH v4 21/21] Sync empty-pmu-events.c with autogenerated one Atish Patra
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