* Re: How does perf collects stats for L1/L2 cache events
[not found] <CAD15agZimrkEsYi12oQRSCjTvNaXd9rFzrPE=tRBkqJiASUJ=A@mail.gmail.com>
@ 2013-08-23 16:23 ` Arnaldo Carvalho de Melo
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From: Arnaldo Carvalho de Melo @ 2013-08-23 16:23 UTC (permalink / raw)
To: Ritesh Harjani
Cc: David Ahern, Michael Ellerman, Manuel Selva, linux-perf-users
Em Fri, Aug 23, 2013 at 04:21:00PM +0530, Ritesh Harjani escreveu:
> Hi folks,
>
> I have some following queries on perf:
>
> 1. how does perf collect L1/L2 cache events on various architectures?
PMU counters.
> 2. My question might be specific to ARM architecture as well, does perf
> collects the stats of cache events based on PMU counter in ARM processor ?
yes
> If no, could some one please tell, how does perf collects this data ?
>
> 3. And how about rest of the architectures ?
PMU counters. Look at arch/
> 4. Also, If possible could someone please guide to that piece of code(
> where cache events stats are collected ) in tools/perf/ ?
Start at arch/arm, I hadn't looked, but did a quick scan now with:
[acme@zoo linux]$ find arch/arm/ -name "*perf*"
- Arnaldo
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