[PATCH 00/26] Update Intel events and metrics

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* [PATCH 00/26] Update Intel events and metrics
@ 2022-01-29  8:09 Ian Rogers
  2022-01-29  8:09 ` [PATCH 01/26] perf test: Allow skip for all metrics test Ian Rogers
                   ` (3 more replies)
  0 siblings, 4 replies; 6+ messages in thread
From: Ian Rogers @ 2022-01-29  8:09 UTC (permalink / raw)
  To: Kan Liang, Zhengjun Xing, Peter Zijlstra, Ingo Molnar,
	Arnaldo Carvalho de Melo, Mark Rutland, Alexander Shishkin,
	Jiri Olsa, Namhyung Kim, Maxime Coquelin, Alexandre Torgue,
	Andi Kleen, James Clark, John Garry, linux-kernel,
	linux-perf-users
  Cc: Stephane Eranian, Ian Rogers

Fetch and update Intel events and metrics using the script at:
https://github.com/intel/event-converter-for-linux-perf/pull/10
Generated events and metrics were added 1-by-1 and tested as much as
possible. Sometimes event data is the same but the files were
regenerated so the script improvements or a stable ordering would
occur. A particular improvement is to reintroduce TMA/Topdown metrics
generated from the full version of the spreadsheet.

Ian Rogers (26):
  perf test: Allow skip for all metrics test
  perf vendor events: Update metrics for SkyLake Server
  perf vendor events: Update metrics for Broadwell DE
  perf vendor events: Update metrics for CascadelakeX
  perf vendor events: Update metrics for HaswellX
  perf vendor events: Update metrics for Ivybridge
  perf vendor events: Update for Westmere EP-DP
  perf vendor events: Update metrics for IcelakeX
  perf vendor events: Update for Bonnell
  perf vendor events: Update metrics for Broadwell
  perf vendor events: Update metrics for BroadwellX
  perf vendor events: Update for Goldmont
  perf vendor events: Update for GoldmontPlus
  perf vendor events: Update metrics for Haswell
  perf vendor events: Update metrics for Icelake
  perf vendor events: Update metrics for Ivytown
  perf vendor events: Update metrics for Jaketown
  perf vendor events: Update Knights Landing
  perf vendor events: Update Nehalem EP
  perf vendor events: Update metrics for Skylake
  perf vendor events: Update Sandybridge
  perf vendor events: Update Silvermont
  perf vendor events: Update Tigerlake
  perf vendor events: Update Westmere EP-SP
  perf vendor events: Update Westmere EX
  perf vendor events: Update TremontX

 .../pmu-events/arch/x86/bonnell/cache.json    |  748 +--
 .../arch/x86/bonnell/floating-point.json      |  274 +-
 .../pmu-events/arch/x86/bonnell/frontend.json |   96 +-
 .../pmu-events/arch/x86/bonnell/memory.json   |  152 +-
 .../pmu-events/arch/x86/bonnell/other.json    |  452 +-
 .../pmu-events/arch/x86/bonnell/pipeline.json |  402 +-
 .../arch/x86/bonnell/virtual-memory.json      |  126 +-
 .../arch/x86/broadwell/bdw-metrics.json       |  353 +-
 .../pmu-events/arch/x86/broadwell/cache.json  | 4713 +++++++++--------
 .../arch/x86/broadwell/floating-point.json    |  235 +-
 .../arch/x86/broadwell/frontend.json          |  361 +-
 .../pmu-events/arch/x86/broadwell/memory.json | 4312 +++++++--------
 .../pmu-events/arch/x86/broadwell/other.json  |   42 +-
 .../arch/x86/broadwell/pipeline.json          | 1903 ++++---
 .../arch/x86/broadwell/virtual-memory.json    |  412 +-
 .../arch/x86/broadwellde/bdwde-metrics.json   |  401 +-
 .../arch/x86/broadwellde/cache.json           | 1122 ++--
 .../arch/x86/broadwellde/floating-point.json  |  222 +-
 .../arch/x86/broadwellde/frontend.json        |  335 +-
 .../arch/x86/broadwellde/memory.json          |  608 +--
 .../arch/x86/broadwellde/other.json           |   28 +-
 .../arch/x86/broadwellde/pipeline.json        | 1892 ++++---
 .../arch/x86/broadwellde/virtual-memory.json  |  394 +-
 .../arch/x86/broadwellx/bdx-metrics.json      |  351 +-
 .../pmu-events/arch/x86/broadwellx/cache.json | 1300 ++---
 .../arch/x86/broadwellx/floating-point.json   |  224 +-
 .../arch/x86/broadwellx/frontend.json         |  335 +-
 .../arch/x86/broadwellx/memory.json           |  974 ++--
 .../pmu-events/arch/x86/broadwellx/other.json |   28 +-
 .../arch/x86/broadwellx/pipeline.json         | 1891 ++++---
 .../arch/x86/broadwellx/virtual-memory.json   |  394 +-
 .../arch/x86/cascadelakex/cache.json          |  967 ++--
 .../arch/x86/cascadelakex/clx-metrics.json    |  469 +-
 .../arch/x86/cascadelakex/floating-point.json |   50 +-
 .../arch/x86/cascadelakex/frontend.json       |   18 +-
 .../arch/x86/cascadelakex/memory.json         | 1008 ++--
 .../arch/x86/cascadelakex/other.json          |  952 ++--
 .../arch/x86/cascadelakex/pipeline.json       |   11 +
 .../arch/x86/cascadelakex/uncore-other.json   |   23 +
 .../pmu-events/arch/x86/goldmont/cache.json   | 1466 +++--
 .../arch/x86/goldmont/floating-point.json     |   33 +
 .../arch/x86/goldmont/frontend.json           |   78 +-
 .../pmu-events/arch/x86/goldmont/memory.json  |   38 +-
 .../pmu-events/arch/x86/goldmont/other.json   |   92 +-
 .../arch/x86/goldmont/pipeline.json           |  538 +-
 .../arch/x86/goldmont/virtual-memory.json     |   94 +-
 .../arch/x86/goldmontplus/cache.json          | 1730 +++---
 .../arch/x86/goldmontplus/floating-point.json |   38 +
 .../arch/x86/goldmontplus/frontend.json       |   88 +-
 .../arch/x86/goldmontplus/memory.json         |   44 +-
 .../arch/x86/goldmontplus/other.json          |  106 +-
 .../arch/x86/goldmontplus/pipeline.json       |  616 +--
 .../arch/x86/goldmontplus/virtual-memory.json |  214 +-
 .../pmu-events/arch/x86/haswell/cache.json    | 1446 +++--
 .../arch/x86/haswell/floating-point.json      |  129 +-
 .../pmu-events/arch/x86/haswell/frontend.json |  362 +-
 .../arch/x86/haswell/hsw-metrics.json         |  265 +-
 .../pmu-events/arch/x86/haswell/memory.json   | 1004 ++--
 .../pmu-events/arch/x86/haswell/other.json    |   40 +-
 .../pmu-events/arch/x86/haswell/pipeline.json | 1796 +++----
 .../arch/x86/haswell/uncore-cache.json        |  252 +
 .../arch/x86/haswell/uncore-other.json        |   69 +
 .../pmu-events/arch/x86/haswell/uncore.json   |  374 --
 .../arch/x86/haswell/virtual-memory.json      |  552 +-
 .../pmu-events/arch/x86/haswellx/cache.json   | 1434 ++---
 .../arch/x86/haswellx/floating-point.json     |  116 +-
 .../arch/x86/haswellx/frontend.json           |  336 +-
 .../arch/x86/haswellx/hsx-metrics.json        |  263 +-
 .../pmu-events/arch/x86/haswellx/memory.json  | 1070 ++--
 .../pmu-events/arch/x86/haswellx/other.json   |   28 +-
 .../arch/x86/haswellx/pipeline.json           | 1763 +++---
 .../arch/x86/haswellx/virtual-memory.json     |  512 +-
 .../pmu-events/arch/x86/icelake/cache.json    |  658 +--
 .../arch/x86/icelake/floating-point.json      |   69 +-
 .../pmu-events/arch/x86/icelake/frontend.json |  449 +-
 .../arch/x86/icelake/icl-metrics.json         |  338 +-
 .../pmu-events/arch/x86/icelake/memory.json   |  591 ++-
 .../pmu-events/arch/x86/icelake/other.json    |  630 +--
 .../pmu-events/arch/x86/icelake/pipeline.json | 1081 ++--
 .../arch/x86/icelake/virtual-memory.json      |  178 +-
 .../pmu-events/arch/x86/icelakex/cache.json   |  851 +--
 .../arch/x86/icelakex/floating-point.json     |   51 +-
 .../arch/x86/icelakex/frontend.json           |  501 +-
 .../arch/x86/icelakex/icx-metrics.json        |  304 +-
 .../pmu-events/arch/x86/icelakex/memory.json  |  601 ++-
 .../pmu-events/arch/x86/icelakex/other.json   |  794 ++-
 .../arch/x86/icelakex/pipeline.json           | 1112 ++--
 .../arch/x86/icelakex/uncore-other.json       |   61 +-
 .../arch/x86/icelakex/virtual-memory.json     |  150 +-
 .../pmu-events/arch/x86/ivybridge/cache.json  | 1446 ++---
 .../arch/x86/ivybridge/floating-point.json    |  212 +-
 .../arch/x86/ivybridge/frontend.json          |  386 +-
 .../arch/x86/ivybridge/ivb-metrics.json       |  287 +-
 .../pmu-events/arch/x86/ivybridge/memory.json |  290 +-
 .../pmu-events/arch/x86/ivybridge/other.json  |   42 +-
 .../arch/x86/ivybridge/pipeline.json          | 1769 +++----
 .../arch/x86/ivybridge/uncore-cache.json      |  252 +
 .../arch/x86/ivybridge/uncore-other.json      |   91 +
 .../pmu-events/arch/x86/ivybridge/uncore.json |  314 --
 .../arch/x86/ivybridge/virtual-memory.json    |  208 +-
 .../pmu-events/arch/x86/ivytown/cache.json    | 1594 +++---
 .../arch/x86/ivytown/floating-point.json      |  212 +-
 .../pmu-events/arch/x86/ivytown/frontend.json |  386 +-
 .../arch/x86/ivytown/ivt-metrics.json         |  277 +-
 .../pmu-events/arch/x86/ivytown/memory.json   |  562 +-
 .../pmu-events/arch/x86/ivytown/other.json    |   42 +-
 .../pmu-events/arch/x86/ivytown/pipeline.json | 1769 +++----
 .../arch/x86/ivytown/virtual-memory.json      |  232 +-
 .../pmu-events/arch/x86/jaketown/cache.json   | 1582 +++---
 .../arch/x86/jaketown/floating-point.json     |  160 +-
 .../arch/x86/jaketown/frontend.json           |  363 +-
 .../arch/x86/jaketown/jkt-metrics.json        |  140 +-
 .../pmu-events/arch/x86/jaketown/memory.json  |  478 +-
 .../pmu-events/arch/x86/jaketown/other.json   |   58 +-
 .../arch/x86/jaketown/pipeline.json           | 1556 +++---
 .../arch/x86/jaketown/virtual-memory.json     |  178 +-
 .../arch/x86/knightslanding/cache.json        | 2602 +++++----
 .../x86/knightslanding/floating-point.json    |   29 +
 .../arch/x86/knightslanding/frontend.json     |   48 +-
 .../arch/x86/knightslanding/memory.json       | 1226 ++---
 .../arch/x86/knightslanding/pipeline.json     |  465 +-
 .../x86/knightslanding/virtual-memory.json    |   68 +-
 .../pmu-events/arch/x86/nehalemep/cache.json  | 3062 +++++------
 .../arch/x86/nehalemep/floating-point.json    |  180 +-
 .../arch/x86/nehalemep/frontend.json          |   18 +-
 .../pmu-events/arch/x86/nehalemep/memory.json |  670 +--
 .../pmu-events/arch/x86/nehalemep/other.json  |  156 +-
 .../arch/x86/nehalemep/pipeline.json          |  764 +--
 .../arch/x86/nehalemep/virtual-memory.json    |   90 +-
 .../arch/x86/sandybridge/cache.json           | 2298 ++++----
 .../arch/x86/sandybridge/floating-point.json  |  172 +-
 .../arch/x86/sandybridge/frontend.json        |  365 +-
 .../arch/x86/sandybridge/memory.json          |  520 +-
 .../arch/x86/sandybridge/other.json           |   66 +-
 .../arch/x86/sandybridge/pipeline.json        | 1634 +++---
 .../arch/x86/sandybridge/snb-metrics.json     |  150 +-
 .../arch/x86/sandybridge/uncore-cache.json    |  252 +
 .../arch/x86/sandybridge/uncore-other.json    |   91 +
 .../arch/x86/sandybridge/uncore.json          |  314 --
 .../arch/x86/sandybridge/virtual-memory.json  |  160 +-
 .../pmu-events/arch/x86/silvermont/cache.json |  940 ++--
 .../arch/x86/silvermont/floating-point.json   |   11 +
 .../arch/x86/silvermont/frontend.json         |   75 +-
 .../arch/x86/silvermont/memory.json           |    8 +-
 .../pmu-events/arch/x86/silvermont/other.json |   20 +-
 .../arch/x86/silvermont/pipeline.json         |  422 +-
 .../arch/x86/silvermont/virtual-memory.json   |   76 +-
 .../pmu-events/arch/x86/skylake/cache.json    | 2611 ++++-----
 .../arch/x86/skylake/floating-point.json      |   48 +-
 .../pmu-events/arch/x86/skylake/frontend.json |  578 +-
 .../pmu-events/arch/x86/skylake/memory.json   | 1566 +++---
 .../pmu-events/arch/x86/skylake/other.json    |   46 +-
 .../pmu-events/arch/x86/skylake/pipeline.json | 1083 ++--
 .../arch/x86/skylake/skl-metrics.json         |  497 +-
 .../arch/x86/skylake/virtual-memory.json      |  274 +-
 .../pmu-events/arch/x86/skylakex/cache.json   |  111 +-
 .../arch/x86/skylakex/floating-point.json     |   24 +-
 .../arch/x86/skylakex/frontend.json           |   18 +-
 .../pmu-events/arch/x86/skylakex/memory.json  |   96 +-
 .../arch/x86/skylakex/pipeline.json           |   11 +
 .../arch/x86/skylakex/skx-metrics.json        |  461 +-
 .../arch/x86/skylakex/uncore-other.json       |   23 +
 .../pmu-events/arch/x86/tigerlake/cache.json  |   44 +-
 .../arch/x86/tigerlake/floating-point.json    |   11 +-
 .../arch/x86/tigerlake/frontend.json          |   17 +-
 .../arch/x86/tigerlake/pipeline.json          |   37 +-
 .../pmu-events/arch/x86/tremontx/cache.json   |  282 +-
 .../arch/x86/tremontx/floating-point.json     |   24 +
 .../arch/x86/tremontx/frontend.json           |   97 +-
 .../pmu-events/arch/x86/tremontx/memory.json  |  449 +-
 .../pmu-events/arch/x86/tremontx/other.json   | 1786 ++++++-
 .../arch/x86/tremontx/pipeline.json           |  341 +-
 .../arch/x86/tremontx/uncore-memory.json      |  156 +-
 .../arch/x86/tremontx/uncore-other.json       | 2045 ++++++-
 .../arch/x86/tremontx/virtual-memory.json     |  320 +-
 .../arch/x86/westmereep-dp/cache.json         | 2734 +++++-----
 .../x86/westmereep-dp/floating-point.json     |  180 +-
 .../arch/x86/westmereep-dp/frontend.json      |   18 +-
 .../arch/x86/westmereep-dp/memory.json        |  686 +--
 .../arch/x86/westmereep-dp/other.json         |  238 +-
 .../arch/x86/westmereep-dp/pipeline.json      |  780 +--
 .../x86/westmereep-dp/virtual-memory.json     |  138 +-
 .../arch/x86/westmereep-sp/cache.json         | 3142 +++++------
 .../x86/westmereep-sp/floating-point.json     |  180 +-
 .../arch/x86/westmereep-sp/frontend.json      |   18 +-
 .../arch/x86/westmereep-sp/memory.json        |  670 +--
 .../arch/x86/westmereep-sp/other.json         |  238 +-
 .../arch/x86/westmereep-sp/pipeline.json      |  780 +--
 .../x86/westmereep-sp/virtual-memory.json     |  120 +-
 .../pmu-events/arch/x86/westmereex/cache.json | 3142 +++++------
 .../arch/x86/westmereex/floating-point.json   |  180 +-
 .../arch/x86/westmereex/frontend.json         |   18 +-
 .../arch/x86/westmereex/memory.json           |  676 +--
 .../pmu-events/arch/x86/westmereex/other.json |  238 +-
 .../arch/x86/westmereex/pipeline.json         |  784 ++-
 .../arch/x86/westmereex/virtual-memory.json   |  138 +-
 tools/perf/tests/shell/stat_all_metrics.sh    |   10 +-
 197 files changed, 61330 insertions(+), 52655 deletions(-)
 create mode 100644 tools/perf/pmu-events/arch/x86/goldmont/floating-point.json
 create mode 100644 tools/perf/pmu-events/arch/x86/goldmontplus/floating-point.json
 create mode 100644 tools/perf/pmu-events/arch/x86/haswell/uncore-cache.json
 create mode 100644 tools/perf/pmu-events/arch/x86/haswell/uncore-other.json
 delete mode 100644 tools/perf/pmu-events/arch/x86/haswell/uncore.json
 create mode 100644 tools/perf/pmu-events/arch/x86/ivybridge/uncore-cache.json
 create mode 100644 tools/perf/pmu-events/arch/x86/ivybridge/uncore-other.json
 delete mode 100644 tools/perf/pmu-events/arch/x86/ivybridge/uncore.json
 create mode 100644 tools/perf/pmu-events/arch/x86/knightslanding/floating-point.json
 create mode 100644 tools/perf/pmu-events/arch/x86/sandybridge/uncore-cache.json
 create mode 100644 tools/perf/pmu-events/arch/x86/sandybridge/uncore-other.json
 delete mode 100644 tools/perf/pmu-events/arch/x86/sandybridge/uncore.json
 create mode 100644 tools/perf/pmu-events/arch/x86/silvermont/floating-point.json
 create mode 100644 tools/perf/pmu-events/arch/x86/tremontx/floating-point.json

-- 
2.35.0.rc2.247.g8bbb082509-goog


^ permalink raw reply	[flat|nested] 6+ messages in thread

* [PATCH 01/26] perf test: Allow skip for all metrics test
  2022-01-29  8:09 [PATCH 00/26] Update Intel events and metrics Ian Rogers
@ 2022-01-29  8:09 ` Ian Rogers
  2022-01-29  8:09 ` [PATCH 23/26] perf vendor events: Update Tigerlake Ian Rogers
                   ` (2 subsequent siblings)
  3 siblings, 0 replies; 6+ messages in thread
From: Ian Rogers @ 2022-01-29  8:09 UTC (permalink / raw)
  To: Kan Liang, Zhengjun Xing, Peter Zijlstra, Ingo Molnar,
	Arnaldo Carvalho de Melo, Mark Rutland, Alexander Shishkin,
	Jiri Olsa, Namhyung Kim, Maxime Coquelin, Alexandre Torgue,
	Andi Kleen, James Clark, John Garry, linux-kernel,
	linux-perf-users
  Cc: Stephane Eranian, Ian Rogers

Some Intel TMA metrics compute a ratio that may divide by 0, which
causes the metric not to print. This happens for metrics with FP_ARITH
events. If we see these events in the result and would otherwise fail,
then switch to a skip.
Also, don't early exit when processing metrics.

Signed-off-by: Ian Rogers <irogers@google.com>
---
 tools/perf/tests/shell/stat_all_metrics.sh | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/tools/perf/tests/shell/stat_all_metrics.sh b/tools/perf/tests/shell/stat_all_metrics.sh
index 7f4ba3cad632..e7c59e5a7a98 100755
--- a/tools/perf/tests/shell/stat_all_metrics.sh
+++ b/tools/perf/tests/shell/stat_all_metrics.sh
@@ -4,6 +4,7 @@
 
 set -e
 
+err=0
 for m in $(perf list --raw-dump metrics); do
   echo "Testing $m"
   result=$(perf stat -M "$m" true 2>&1)
@@ -14,9 +15,14 @@ for m in $(perf list --raw-dump metrics); do
     if [[ ! "$result" =~ "$m" ]]; then
       echo "Metric '$m' not printed in:"
       echo "$result"
-      exit 1
+      if [[ "$result" =~ "FP_ARITH" && "$err" != "1" ]]; then
+        echo "Skip, not fail, for FP issues"
+        err=2
+      else
+        err=1
+      fi
     fi
   fi
 done
 
-exit 0
+exit "$err"
-- 
2.35.0.rc2.247.g8bbb082509-goog


^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [PATCH 23/26] perf vendor events: Update Tigerlake
  2022-01-29  8:09 [PATCH 00/26] Update Intel events and metrics Ian Rogers
  2022-01-29  8:09 ` [PATCH 01/26] perf test: Allow skip for all metrics test Ian Rogers
@ 2022-01-29  8:09 ` Ian Rogers
       [not found] ` <20220129080929.837293-4-irogers@google.com>
  2022-01-31 14:04 ` [PATCH 00/26] Update Intel events and metrics Liang, Kan
  3 siblings, 0 replies; 6+ messages in thread
From: Ian Rogers @ 2022-01-29  8:09 UTC (permalink / raw)
  To: Kan Liang, Zhengjun Xing, Peter Zijlstra, Ingo Molnar,
	Arnaldo Carvalho de Melo, Mark Rutland, Alexander Shishkin,
	Jiri Olsa, Namhyung Kim, Maxime Coquelin, Alexandre Torgue,
	Andi Kleen, James Clark, John Garry, linux-kernel,
	linux-perf-users
  Cc: Stephane Eranian, Ian Rogers

Events are updated to version 1.06:
    https://download.01.org/perfmon/TGL
Json files generated by the latest code at:
    https://github.com/intel/event-converter-for-linux-perf

Tested:
Not tested on a Tigerlake, on a SkylakeX:
...
  9: Parse perf pmu format                                           : Ok
 10: PMU events                                                      :
 10.1: PMU event table sanity                                        : Ok
 10.2: PMU event map aliases                                         : Ok
 10.3: Parsing of PMU event table metrics                            : Ok
 10.4: Parsing of PMU event table metrics with fake PMUs             : Ok
...

Signed-off-by: Ian Rogers <irogers@google.com>
---
 .../pmu-events/arch/x86/tigerlake/cache.json  | 44 +++++++++++++++++--
 .../arch/x86/tigerlake/floating-point.json    | 11 ++++-
 .../arch/x86/tigerlake/frontend.json          | 17 ++++++-
 .../arch/x86/tigerlake/pipeline.json          | 37 +++++++++++++++-
 4 files changed, 100 insertions(+), 9 deletions(-)

diff --git a/tools/perf/pmu-events/arch/x86/tigerlake/cache.json b/tools/perf/pmu-events/arch/x86/tigerlake/cache.json
index 8d767b8932b0..543a3298f86f 100644
--- a/tools/perf/pmu-events/arch/x86/tigerlake/cache.json
+++ b/tools/perf/pmu-events/arch/x86/tigerlake/cache.json
@@ -145,6 +145,17 @@
         "SampleAfterValue": "200003",
         "UMask": "0x24"
     },
+    {
+        "BriefDescription": "Demand Data Read requests that hit L2 cache",
+        "CollectPEBSRecord": "2",
+        "Counter": "0,1,2,3",
+        "EventCode": "0x24",
+        "EventName": "L2_RQSTS.DEMAND_DATA_RD_HIT",
+        "PEBScounters": "0,1,2,3",
+        "PublicDescription": "Counts the number of demand Data Read requests initiated by load instructions that hit L2 cache.",
+        "SampleAfterValue": "200003",
+        "UMask": "0xc1"
+    },
     {
         "BriefDescription": "All requests that miss L2 cache",
         "CollectPEBSRecord": "2",
@@ -185,7 +196,7 @@
         "EventCode": "0x24",
         "EventName": "L2_RQSTS.SWPF_HIT",
         "PEBScounters": "0,1,2,3",
-        "PublicDescription": "Counts Software prefetch requests that hit the L2 cache. This event accounts for PREFETCHNTA and PREFETCHT0/1/2 instructions.",
+        "PublicDescription": "Counts Software prefetch requests that hit the L2 cache. Accounts for PREFETCHNTA and PREFETCHT0/1/2 instructions when FB is not full.",
         "SampleAfterValue": "200003",
         "UMask": "0xc8"
     },
@@ -196,7 +207,7 @@
         "EventCode": "0x24",
         "EventName": "L2_RQSTS.SWPF_MISS",
         "PEBScounters": "0,1,2,3",
-        "PublicDescription": "Counts Software prefetch requests that miss the L2 cache. This event accounts for PREFETCHNTA and PREFETCHT0/1/2 instructions.",
+        "PublicDescription": "Counts Software prefetch requests that miss the L2 cache. Accounts for PREFETCHNTA and PREFETCHT0/1/2 instructions when FB is not full.",
         "SampleAfterValue": "200003",
         "UMask": "0x28"
     },
@@ -222,6 +233,17 @@
         "SampleAfterValue": "2000003",
         "UMask": "0x2"
     },
+    {
+        "BriefDescription": "Core-originated cacheable requests that missed L3  (Except hardware prefetches to the L3)",
+        "CollectPEBSRecord": "2",
+        "Counter": "0,1,2,3,4,5,6,7",
+        "EventCode": "0x2e",
+        "EventName": "LONGEST_LAT_CACHE.MISS",
+        "PEBScounters": "0,1,2,3,4,5,6,7",
+        "PublicDescription": "Counts core-originated cacheable requests that miss the L3 cache (Longest Latency cache). Requests include data and code reads, Reads-for-Ownership (RFOs), speculative accesses and hardware prefetches to the L1 and L2.  It does not include hardware prefetches to the L3, and may not count other types of requests to the L3.",
+        "SampleAfterValue": "100003",
+        "UMask": "0x41"
+    },
     {
         "BriefDescription": "All retired load instructions.",
         "CollectPEBSRecord": "2",
@@ -249,6 +271,20 @@
         "SampleAfterValue": "1000003",
         "UMask": "0x82"
     },
+    {
+        "BriefDescription": "All retired memory instructions.",
+        "CollectPEBSRecord": "2",
+        "Counter": "0,1,2,3",
+        "Data_LA": "1",
+        "EventCode": "0xd0",
+        "EventName": "MEM_INST_RETIRED.ANY",
+        "L1_Hit_Indication": "1",
+        "PEBS": "1",
+        "PEBScounters": "0,1,2,3",
+        "PublicDescription": "Counts all retired memory instructions - loads and stores.",
+        "SampleAfterValue": "1000003",
+        "UMask": "0x83"
+    },
     {
         "BriefDescription": "Retired load instructions with locked access.",
         "CollectPEBSRecord": "2",
@@ -298,7 +334,7 @@
         "EventName": "MEM_INST_RETIRED.STLB_MISS_LOADS",
         "PEBS": "1",
         "PEBScounters": "0,1,2,3",
-        "PublicDescription": "Counts retired load instructions that true miss the STLB.",
+        "PublicDescription": "Number of retired load instructions that (start a) miss in the 2nd-level TLB (STLB).",
         "SampleAfterValue": "100003",
         "UMask": "0x11"
     },
@@ -312,7 +348,7 @@
         "L1_Hit_Indication": "1",
         "PEBS": "1",
         "PEBScounters": "0,1,2,3",
-        "PublicDescription": "Counts retired store instructions that true miss the STLB.",
+        "PublicDescription": "Number of retired store instructions that (start a) miss in the 2nd-level TLB (STLB).",
         "SampleAfterValue": "100003",
         "UMask": "0x12"
     },
diff --git a/tools/perf/pmu-events/arch/x86/tigerlake/floating-point.json b/tools/perf/pmu-events/arch/x86/tigerlake/floating-point.json
index 402f01851313..de8eb2b34a3a 100644
--- a/tools/perf/pmu-events/arch/x86/tigerlake/floating-point.json
+++ b/tools/perf/pmu-events/arch/x86/tigerlake/floating-point.json
@@ -17,6 +17,7 @@
         "EventCode": "0xc7",
         "EventName": "FP_ARITH_INST_RETIRED.128B_PACKED_DOUBLE",
         "PEBScounters": "0,1,2,3,4,5,6,7",
+        "PublicDescription": "Number of SSE/AVX computational 128-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 2 computation operations, one for each element.  Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT DPP FM(N)ADD/SUB.  DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
         "SampleAfterValue": "100003",
         "UMask": "0x4"
     },
@@ -27,7 +28,7 @@
         "EventCode": "0xc7",
         "EventName": "FP_ARITH_INST_RETIRED.128B_PACKED_SINGLE",
         "PEBScounters": "0,1,2,3,4,5,6,7",
-        "PublicDescription": "Counts number of SSE/AVX computational 128-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 4 computation operations, one for each element.  Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RCP DPP FM(N)ADD/SUB.  DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.",
+        "PublicDescription": "Number of SSE/AVX computational 128-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 4 computation operations, one for each element.  Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RCP DPP FM(N)ADD/SUB.  DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
         "SampleAfterValue": "100003",
         "UMask": "0x8"
     },
@@ -38,6 +39,7 @@
         "EventCode": "0xc7",
         "EventName": "FP_ARITH_INST_RETIRED.256B_PACKED_DOUBLE",
         "PEBScounters": "0,1,2,3,4,5,6,7",
+        "PublicDescription": "Number of SSE/AVX computational 256-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 4 computation operations, one for each element.  Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT FM(N)ADD/SUB.  FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
         "SampleAfterValue": "100003",
         "UMask": "0x10"
     },
@@ -48,6 +50,7 @@
         "EventCode": "0xc7",
         "EventName": "FP_ARITH_INST_RETIRED.256B_PACKED_SINGLE",
         "PEBScounters": "0,1,2,3,4,5,6,7",
+        "PublicDescription": "Number of SSE/AVX computational 256-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 8 computation operations, one for each element.  Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB HADD HSUB SUBADD MUL DIV MIN MAX SQRT RSQRT RCP DPP FM(N)ADD/SUB.  DPP and FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
         "SampleAfterValue": "100003",
         "UMask": "0x20"
     },
@@ -58,16 +61,18 @@
         "EventCode": "0xc7",
         "EventName": "FP_ARITH_INST_RETIRED.512B_PACKED_DOUBLE",
         "PEBScounters": "0,1,2,3,4,5,6,7",
+        "PublicDescription": "Number of SSE/AVX computational 512-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 8 computation operations, one for each element.  Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT14 RCP14 FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
         "SampleAfterValue": "100003",
         "UMask": "0x40"
     },
     {
-        "BriefDescription": "Counts number of SSE/AVX computational 512-bit packed double precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 16 computation operations, one for each element.  Applies to SSE* and AVX* packed double precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT14 RCP14 FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.",
+        "BriefDescription": "Counts number of SSE/AVX computational 512-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 16 computation operations, one for each element.  Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT14 RCP14 FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element.",
         "CollectPEBSRecord": "2",
         "Counter": "0,1,2,3,4,5,6,7",
         "EventCode": "0xc7",
         "EventName": "FP_ARITH_INST_RETIRED.512B_PACKED_SINGLE",
         "PEBScounters": "0,1,2,3,4,5,6,7",
+        "PublicDescription": "Number of SSE/AVX computational 512-bit packed single precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 16 computation operations, one for each element.  Applies to SSE* and AVX* packed single precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT14 RCP14 FM(N)ADD/SUB. FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
         "SampleAfterValue": "100003",
         "UMask": "0x80"
     },
@@ -78,6 +83,7 @@
         "EventCode": "0xc7",
         "EventName": "FP_ARITH_INST_RETIRED.SCALAR_DOUBLE",
         "PEBScounters": "0,1,2,3,4,5,6,7",
+        "PublicDescription": "Number of SSE/AVX computational scalar double precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 1 computational operation. Applies to SSE* and AVX* scalar double precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT FM(N)ADD/SUB.  FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
         "SampleAfterValue": "100003",
         "UMask": "0x1"
     },
@@ -88,6 +94,7 @@
         "EventCode": "0xc7",
         "EventName": "FP_ARITH_INST_RETIRED.SCALAR_SINGLE",
         "PEBScounters": "0,1,2,3,4,5,6,7",
+        "PublicDescription": "Number of SSE/AVX computational scalar single precision floating-point instructions retired; some instructions will count twice as noted below.  Each count represents 1 computational operation. Applies to SSE* and AVX* scalar single precision floating-point instructions: ADD SUB MUL DIV MIN MAX SQRT RSQRT RCP FM(N)ADD/SUB.  FM(N)ADD/SUB instructions count twice as they perform 2 calculations per element. The DAZ and FTZ flags in the MXCSR register need to be set when using these events.",
         "SampleAfterValue": "100003",
         "UMask": "0x2"
     }
diff --git a/tools/perf/pmu-events/arch/x86/tigerlake/frontend.json b/tools/perf/pmu-events/arch/x86/tigerlake/frontend.json
index 24c736ac8f8e..2eaa33cc574e 100644
--- a/tools/perf/pmu-events/arch/x86/tigerlake/frontend.json
+++ b/tools/perf/pmu-events/arch/x86/tigerlake/frontend.json
@@ -39,12 +39,27 @@
         "CollectPEBSRecord": "2",
         "Counter": "0,1,2,3,4,5,6,7",
         "EventCode": "0xc6",
+        "EventName": "FRONTEND_RETIRED.ANY_DSB_MISS",
+        "MSRIndex": "0x3F7",
+        "MSRValue": "0x1",
+        "PEBS": "1",
+        "PEBScounters": "0,1,2,3,4,5,6,7",
+        "PublicDescription": "Counts retired Instructions that experienced DSB (Decode stream buffer i.e. the decoded instruction-cache) miss.",
+        "SampleAfterValue": "100007",
+        "TakenAlone": "1",
+        "UMask": "0x1"
+    },
+    {
+        "BriefDescription": "Retired Instructions who experienced a critical DSB miss.",
+        "CollectPEBSRecord": "2",
+        "Counter": "0,1,2,3,4,5,6,7",
+        "EventCode": "0xc6",
         "EventName": "FRONTEND_RETIRED.DSB_MISS",
         "MSRIndex": "0x3F7",
         "MSRValue": "0x11",
         "PEBS": "1",
         "PEBScounters": "0,1,2,3,4,5,6,7",
-        "PublicDescription": "Counts retired Instructions that experienced DSB (Decode stream buffer i.e. the decoded instruction-cache) miss.",
+        "PublicDescription": "Number of retired Instructions that experienced a critical DSB (Decode stream buffer i.e. the decoded instruction-cache) miss. Critical means stalls were exposed to the back-end as a result of the DSB miss.",
         "SampleAfterValue": "100007",
         "TakenAlone": "1",
         "UMask": "0x1"
diff --git a/tools/perf/pmu-events/arch/x86/tigerlake/pipeline.json b/tools/perf/pmu-events/arch/x86/tigerlake/pipeline.json
index d0d8a09bc470..4dc3a16e3da4 100644
--- a/tools/perf/pmu-events/arch/x86/tigerlake/pipeline.json
+++ b/tools/perf/pmu-events/arch/x86/tigerlake/pipeline.json
@@ -71,14 +71,14 @@
         "UMask": "0x40"
     },
     {
-        "BriefDescription": "All indirect branch instructions retired (excluding RETs. TSX aborts are considered indirect branch).",
+        "BriefDescription": "Indirect near branch instructions retired (excluding returns)",
         "CollectPEBSRecord": "2",
         "Counter": "0,1,2,3,4,5,6,7",
         "EventCode": "0xc4",
         "EventName": "BR_INST_RETIRED.INDIRECT",
         "PEBS": "1",
         "PEBScounters": "0,1,2,3,4,5,6,7",
-        "PublicDescription": "Counts all indirect branch instructions retired (excluding RETs. TSX aborts is considered indirect branch).",
+        "PublicDescription": "Counts near indirect branch instructions retired excluding returns. TSX abort is an indirect branch.",
         "SampleAfterValue": "100003",
         "UMask": "0x80"
     },
@@ -442,6 +442,17 @@
         "SampleAfterValue": "500009",
         "UMask": "0x1"
     },
+    {
+        "BriefDescription": "Instruction decoders utilized in a cycle",
+        "CollectPEBSRecord": "2",
+        "Counter": "0,1,2,3",
+        "EventCode": "0x55",
+        "EventName": "INST_DECODED.DECODERS",
+        "PEBScounters": "0,1,2,3",
+        "PublicDescription": "Number of decoders utilized in a cycle when the MITE (legacy decode pipeline) fetches instructions.",
+        "SampleAfterValue": "2000003",
+        "UMask": "0x1"
+    },
     {
         "BriefDescription": "Number of instructions retired. Fixed Counter - architectural event",
         "CollectPEBSRecord": "2",
@@ -464,6 +475,17 @@
         "PublicDescription": "Counts the number of X86 instructions retired - an Architectural PerfMon event. Counting continues during hardware interrupts, traps, and inside interrupt handlers. Notes: INST_RETIRED.ANY is counted by a designated fixed counter freeing up programmable counters to count other events. INST_RETIRED.ANY_P is counted by a programmable counter.",
         "SampleAfterValue": "2000003"
     },
+    {
+        "BriefDescription": "Number of all retired NOP instructions.",
+        "CollectPEBSRecord": "2",
+        "Counter": "0,1,2,3,4,5,6,7",
+        "EventCode": "0xc0",
+        "EventName": "INST_RETIRED.NOP",
+        "PEBS": "1",
+        "PEBScounters": "0,1,2,3,4,5,6,7",
+        "SampleAfterValue": "2000003",
+        "UMask": "0x2"
+    },
     {
         "BriefDescription": "Precise instruction retired event with a reduced effect of PEBS shadow in IP distribution",
         "CollectPEBSRecord": "2",
@@ -689,6 +711,17 @@
         "SampleAfterValue": "100003",
         "UMask": "0x1"
     },
+    {
+        "BriefDescription": "Number of uops decoded out of instructions exclusively fetched by decoder 0",
+        "CollectPEBSRecord": "2",
+        "Counter": "0,1,2,3",
+        "EventCode": "0x56",
+        "EventName": "UOPS_DECODED.DEC0",
+        "PEBScounters": "0,1,2,3",
+        "PublicDescription": "Uops exclusively fetched by decoder 0",
+        "SampleAfterValue": "1000003",
+        "UMask": "0x1"
+    },
     {
         "BriefDescription": "Number of uops executed on port 0",
         "CollectPEBSRecord": "2",
-- 
2.35.0.rc2.247.g8bbb082509-goog


^ permalink raw reply related	[flat|nested] 6+ messages in thread

[parent not found: <20220129080929.837293-4-irogers@google.com>]

* Re: [PATCH 03/26] perf vendor events: Update metrics for Broadwell DE
       [not found] ` <20220129080929.837293-4-irogers@google.com>
@ 2022-01-31 13:53   ` Liang, Kan
  2022-01-31 18:59     ` Ian Rogers
  0 siblings, 1 reply; 6+ messages in thread
From: Liang, Kan @ 2022-01-31 13:53 UTC (permalink / raw)
  To: Ian Rogers, Zhengjun Xing, Peter Zijlstra, Ingo Molnar,
	Arnaldo Carvalho de Melo, Mark Rutland, Alexander Shishkin,
	Jiri Olsa, Namhyung Kim, Maxime Coquelin, Alexandre Torgue,
	Andi Kleen, James Clark, John Garry, linux-kernel,
	linux-perf-users
  Cc: Stephane Eranian



On 1/29/2022 3:09 AM, Ian Rogers wrote:
> Based on TMA_metrics-full.csv version 4.3 at 01.org:
>      https://download.01.org/perfmon/
> Events are still at version 7:
>      https://download.01.org/perfmon/BDW-DE
> Json files generated by:
>      https://github.com/intel/event-converter-for-linux-perf
> 
> This adds TopdownL1_SMT metrics to bdwde-metrics.json as
> generated by the extract-tmam.py script.
> 
> Tested:
> ...
>    6: Parse event definition strings                                  : Ok
>    7: Simple expression parser                                        : Ok
> ...
>    9: Parse perf pmu format                                           : Ok
>   10: PMU events                                                      :
>   10.1: PMU event table sanity                                        : Ok
>   10.2: PMU event map aliases                                         : Ok
>   10.3: Parsing of PMU event table metrics                            : Skip (some metrics failed)
>   10.4: Parsing of PMU event table metrics with fake PMUs             : Ok
> ...
>   68: Parse and process metrics                                       : Ok
> ...
>   88: perf stat metrics (shadow stat) test                            : Ok
>   89: perf all metricgroups test                                      : FAILED!
>   90: perf all metrics test                                           : FAILED!
>   91: perf all PMU test                                               : Ok
> ...
> The failures/skips relate to:
> event syntax error: '{arb/event=0x84,umask=0x1,metric-id=arb!3event!20x84!0umask!20x1!3/,arb/even..'
>                       \___ Cannot find PMU `arb'. Missing kernel support?
> 

ARB is an uncore unit for client platforms. Broadwell DE should be a 
server platform. It looks like an issue of TMA_metrics-full.csv.
I will check and see whether we can fix the TMA file.

Thanks,
Kan

> Signed-off-by: Ian Rogers<irogers@google.com>
> ---
>   .../arch/x86/broadwellde/bdwde-metrics.json   |  401 +++-
>   .../arch/x86/broadwellde/cache.json           | 1122 +++++-----
>   .../arch/x86/broadwellde/floating-point.json  |  222 +-
>   .../arch/x86/broadwellde/frontend.json        |  335 +--
>   .../arch/x86/broadwellde/memory.json          |  608 +++---
>   .../arch/x86/broadwellde/other.json           |   28 +-
>   .../arch/x86/broadwellde/pipeline.json        | 1892 ++++++++---------
>   .../arch/x86/broadwellde/virtual-memory.json  |  394 ++--
>   8 files changed, 2646 insertions(+), 2356 deletions(-)

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH 03/26] perf vendor events: Update metrics for Broadwell DE
  2022-01-31 13:53   ` [PATCH 03/26] perf vendor events: Update metrics for Broadwell DE Liang, Kan
@ 2022-01-31 18:59     ` Ian Rogers
  0 siblings, 0 replies; 6+ messages in thread
From: Ian Rogers @ 2022-01-31 18:59 UTC (permalink / raw)
  To: Liang, Kan
  Cc: Zhengjun Xing, Peter Zijlstra, Ingo Molnar,
	Arnaldo Carvalho de Melo, Mark Rutland, Alexander Shishkin,
	Jiri Olsa, Namhyung Kim, Maxime Coquelin, Alexandre Torgue,
	Andi Kleen, James Clark, John Garry, linux-kernel,
	linux-perf-users, Stephane Eranian

On Mon, Jan 31, 2022 at 5:54 AM Liang, Kan <kan.liang@linux.intel.com> wrote:
>
>
>
> On 1/29/2022 3:09 AM, Ian Rogers wrote:
> > Based on TMA_metrics-full.csv version 4.3 at 01.org:
> >      https://download.01.org/perfmon/
> > Events are still at version 7:
> >      https://download.01.org/perfmon/BDW-DE
> > Json files generated by:
> >      https://github.com/intel/event-converter-for-linux-perf
> >
> > This adds TopdownL1_SMT metrics to bdwde-metrics.json as
> > generated by the extract-tmam.py script.
> >
> > Tested:
> > ...
> >    6: Parse event definition strings                                  : Ok
> >    7: Simple expression parser                                        : Ok
> > ...
> >    9: Parse perf pmu format                                           : Ok
> >   10: PMU events                                                      :
> >   10.1: PMU event table sanity                                        : Ok
> >   10.2: PMU event map aliases                                         : Ok
> >   10.3: Parsing of PMU event table metrics                            : Skip (some metrics failed)
> >   10.4: Parsing of PMU event table metrics with fake PMUs             : Ok
> > ...
> >   68: Parse and process metrics                                       : Ok
> > ...
> >   88: perf stat metrics (shadow stat) test                            : Ok
> >   89: perf all metricgroups test                                      : FAILED!
> >   90: perf all metrics test                                           : FAILED!
> >   91: perf all PMU test                                               : Ok
> > ...
> > The failures/skips relate to:
> > event syntax error: '{arb/event=0x84,umask=0x1,metric-id=arb!3event!20x84!0umask!20x1!3/,arb/even..'
> >                       \___ Cannot find PMU `arb'. Missing kernel support?
> >
>
> ARB is an uncore unit for client platforms. Broadwell DE should be a
> server platform. It looks like an issue of TMA_metrics-full.csv.
> I will check and see whether we can fix the TMA file.

I modified the TMA_Metrics-full.csv to change the BDX column to be
BDX/BDW-DE and the BDW/BDW-DE column to be BDW. Doing this and then
applying a corresponding change to extract-tma-metrics.py (below)
created a perf json metric file that passed all the tests. I will
resend the generated files in a v2.

Thanks,
Ian

```
diff --git a/extract-tma-metrics.py b/extract-tma-metrics.py
index ed22e05..5c872ba 100755
--- a/extract-tma-metrics.py
+++ b/extract-tma-metrics.py
@@ -93,16 +93,16 @@ ratio_column = {
     "IVB": ("IVB", "SNB", ),
     "HSW": ("HSW", "IVB", "SNB", ),
     "HSX": ("HSX", "HSW", "IVT", "IVB", "JKT/SNB-EP", "SNB"),
-    "BDW/BDW-DE": ("BDW/BDW-DE", "HSW", "IVB", "SNB", ),
-    "BDX": ("BDX", "BDW/BDW-DE", "HSX", "HSW", "IVT", "IVB",
"JKT/SNB-EP", "SNB"),
+    "BDW": ("BDW", "HSW", "IVB", "SNB", ),
+    "BDX/BDW-DE": ("BDX/BDW-DE", "BDW", "HSX", "HSW", "IVT", "IVB",
"JKT/SNB-EP", "SNB"),
     "SNB": ("SNB", ),
     "JKT/SNB-EP": ("JKT/SNB-EP", "SNB"),
-    "SKL/KBL": ("SKL/KBL", "BDW/BDW-DE", "HSW", "IVB", "SNB"),
-    "SKX": ("SKX", "SKL/KBL", "BDX", "BDW/BDW-DE", "HSX", "HSW",
"IVT", "IVB", "JKT/SNB-EP", "SNB"),
-    "KBLR/CFL": ("KBLR/CFL", "SKL/KBL", "BDW/BDW-DE", "HSW", "IVB", "SNB"),
-    "CLX": ("CLX", "KBLR/CFL/CML", "SKX", "SKL/KBL", "BDX",
"BDW/BDW-DE", "HSX", "HSW", "IVT", "IVB", "JKT/SNB-EP", "SNB"),
-    "ICL": ("ICL", "CNL", "KBLR/CFL/CML", "SKL/KBL", "BDW/BDW-DE",
"HSW", "IVB", "SNB"),
-    "ICX": ("ICX", "ICL", "CNL", "CPX", "CLX", "KBLR/CFL/CML", "SKX",
"SKL/KBL", "BDX", "BDW/BDW-DE", "HSX", "HSW", "IVT", "IVB",
"JKT/SNB-EP", "SNB"),
+    "SKL/KBL": ("SKL/KBL", "BDW", "HSW", "IVB", "SNB"),
+    "SKX": ("SKX", "SKL/KBL", "BDX/BDW-DE", "BDW", "HSX", "HSW",
"IVT", "IVB", "JKT/SNB-EP", "SNB"),
+    "KBLR/CFL": ("KBLR/CFL", "SKL/KBL", "BDW", "HSW", "IVB", "SNB"),
+    "CLX": ("CLX", "KBLR/CFL/CML", "SKX", "SKL/KBL", "BDX/BDW-DE",
"BDW", "HSX", "HSW", "IVT", "IVB", "JKT/SNB-EP", "SNB"),
+    "ICL": ("ICL", "CNL", "KBLR/CFL/CML", "SKL/KBL", "BDW", "HSW",
"IVB", "SNB"),
+    "ICX": ("ICX", "ICL", "CNL", "CPX", "CLX", "KBLR/CFL/CML", "SKX",
"SKL/KBL", "BDX/BDW-DE", "BDW", "HSX", "HSW", "IVT", "IVB",
"JKT/SNB-EP", "SNB"),
 }

 ap = argparse.ArgumentParser()
```

> Thanks,
> Kan
>
> > Signed-off-by: Ian Rogers<irogers@google.com>
> > ---
> >   .../arch/x86/broadwellde/bdwde-metrics.json   |  401 +++-
> >   .../arch/x86/broadwellde/cache.json           | 1122 +++++-----
> >   .../arch/x86/broadwellde/floating-point.json  |  222 +-
> >   .../arch/x86/broadwellde/frontend.json        |  335 +--
> >   .../arch/x86/broadwellde/memory.json          |  608 +++---
> >   .../arch/x86/broadwellde/other.json           |   28 +-
> >   .../arch/x86/broadwellde/pipeline.json        | 1892 ++++++++---------
> >   .../arch/x86/broadwellde/virtual-memory.json  |  394 ++--
> >   8 files changed, 2646 insertions(+), 2356 deletions(-)

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* Re: [PATCH 00/26] Update Intel events and metrics
  2022-01-29  8:09 [PATCH 00/26] Update Intel events and metrics Ian Rogers
                   ` (2 preceding siblings ...)
       [not found] ` <20220129080929.837293-4-irogers@google.com>
@ 2022-01-31 14:04 ` Liang, Kan
  3 siblings, 0 replies; 6+ messages in thread
From: Liang, Kan @ 2022-01-31 14:04 UTC (permalink / raw)
  To: Ian Rogers, Zhengjun Xing, Peter Zijlstra, Ingo Molnar,
	Arnaldo Carvalho de Melo, Mark Rutland, Alexander Shishkin,
	Jiri Olsa, Namhyung Kim, Maxime Coquelin, Alexandre Torgue,
	Andi Kleen, James Clark, John Garry, linux-kernel,
	linux-perf-users
  Cc: Stephane Eranian

Hi Ian,

On 1/29/2022 3:09 AM, Ian Rogers wrote:
> Fetch and update Intel events and metrics using the script at:
> https://github.com/intel/event-converter-for-linux-perf/pull/10
> Generated events and metrics were added 1-by-1 and tested as much as
> possible. Sometimes event data is the same but the files were
> regenerated so the script improvements or a stable ordering would
> occur. A particular improvement is to reintroduce TMA/Topdown metrics
> generated from the full version of the spreadsheet.
>

I highly appreciate the patch series.

Except the patch for Broadwell DE ("[PATCH 03/26] perf vendor events: 
Update metrics for Broadwell DE"), the rest of the patches look good.

Reviewed-by: Kan Liang <kan.liang@linux.intel.com>

Thanks,
Kan

> Ian Rogers (26):
>    perf test: Allow skip for all metrics test
>    perf vendor events: Update metrics for SkyLake Server
>    perf vendor events: Update metrics for Broadwell DE
>    perf vendor events: Update metrics for CascadelakeX
>    perf vendor events: Update metrics for HaswellX
>    perf vendor events: Update metrics for Ivybridge
>    perf vendor events: Update for Westmere EP-DP
>    perf vendor events: Update metrics for IcelakeX
>    perf vendor events: Update for Bonnell
>    perf vendor events: Update metrics for Broadwell
>    perf vendor events: Update metrics for BroadwellX
>    perf vendor events: Update for Goldmont
>    perf vendor events: Update for GoldmontPlus
>    perf vendor events: Update metrics for Haswell
>    perf vendor events: Update metrics for Icelake
>    perf vendor events: Update metrics for Ivytown
>    perf vendor events: Update metrics for Jaketown
>    perf vendor events: Update Knights Landing
>    perf vendor events: Update Nehalem EP
>    perf vendor events: Update metrics for Skylake
>    perf vendor events: Update Sandybridge
>    perf vendor events: Update Silvermont
>    perf vendor events: Update Tigerlake
>    perf vendor events: Update Westmere EP-SP
>    perf vendor events: Update Westmere EX
>    perf vendor events: Update TremontX
> 
>   .../pmu-events/arch/x86/bonnell/cache.json    |  748 +--
>   .../arch/x86/bonnell/floating-point.json      |  274 +-
>   .../pmu-events/arch/x86/bonnell/frontend.json |   96 +-
>   .../pmu-events/arch/x86/bonnell/memory.json   |  152 +-
>   .../pmu-events/arch/x86/bonnell/other.json    |  452 +-
>   .../pmu-events/arch/x86/bonnell/pipeline.json |  402 +-
>   .../arch/x86/bonnell/virtual-memory.json      |  126 +-
>   .../arch/x86/broadwell/bdw-metrics.json       |  353 +-
>   .../pmu-events/arch/x86/broadwell/cache.json  | 4713 +++++++++--------
>   .../arch/x86/broadwell/floating-point.json    |  235 +-
>   .../arch/x86/broadwell/frontend.json          |  361 +-
>   .../pmu-events/arch/x86/broadwell/memory.json | 4312 +++++++--------
>   .../pmu-events/arch/x86/broadwell/other.json  |   42 +-
>   .../arch/x86/broadwell/pipeline.json          | 1903 ++++---
>   .../arch/x86/broadwell/virtual-memory.json    |  412 +-
>   .../arch/x86/broadwellde/bdwde-metrics.json   |  401 +-
>   .../arch/x86/broadwellde/cache.json           | 1122 ++--
>   .../arch/x86/broadwellde/floating-point.json  |  222 +-
>   .../arch/x86/broadwellde/frontend.json        |  335 +-
>   .../arch/x86/broadwellde/memory.json          |  608 +--
>   .../arch/x86/broadwellde/other.json           |   28 +-
>   .../arch/x86/broadwellde/pipeline.json        | 1892 ++++---
>   .../arch/x86/broadwellde/virtual-memory.json  |  394 +-
>   .../arch/x86/broadwellx/bdx-metrics.json      |  351 +-
>   .../pmu-events/arch/x86/broadwellx/cache.json | 1300 ++---
>   .../arch/x86/broadwellx/floating-point.json   |  224 +-
>   .../arch/x86/broadwellx/frontend.json         |  335 +-
>   .../arch/x86/broadwellx/memory.json           |  974 ++--
>   .../pmu-events/arch/x86/broadwellx/other.json |   28 +-
>   .../arch/x86/broadwellx/pipeline.json         | 1891 ++++---
>   .../arch/x86/broadwellx/virtual-memory.json   |  394 +-
>   .../arch/x86/cascadelakex/cache.json          |  967 ++--
>   .../arch/x86/cascadelakex/clx-metrics.json    |  469 +-
>   .../arch/x86/cascadelakex/floating-point.json |   50 +-
>   .../arch/x86/cascadelakex/frontend.json       |   18 +-
>   .../arch/x86/cascadelakex/memory.json         | 1008 ++--
>   .../arch/x86/cascadelakex/other.json          |  952 ++--
>   .../arch/x86/cascadelakex/pipeline.json       |   11 +
>   .../arch/x86/cascadelakex/uncore-other.json   |   23 +
>   .../pmu-events/arch/x86/goldmont/cache.json   | 1466 +++--
>   .../arch/x86/goldmont/floating-point.json     |   33 +
>   .../arch/x86/goldmont/frontend.json           |   78 +-
>   .../pmu-events/arch/x86/goldmont/memory.json  |   38 +-
>   .../pmu-events/arch/x86/goldmont/other.json   |   92 +-
>   .../arch/x86/goldmont/pipeline.json           |  538 +-
>   .../arch/x86/goldmont/virtual-memory.json     |   94 +-
>   .../arch/x86/goldmontplus/cache.json          | 1730 +++---
>   .../arch/x86/goldmontplus/floating-point.json |   38 +
>   .../arch/x86/goldmontplus/frontend.json       |   88 +-
>   .../arch/x86/goldmontplus/memory.json         |   44 +-
>   .../arch/x86/goldmontplus/other.json          |  106 +-
>   .../arch/x86/goldmontplus/pipeline.json       |  616 +--
>   .../arch/x86/goldmontplus/virtual-memory.json |  214 +-
>   .../pmu-events/arch/x86/haswell/cache.json    | 1446 +++--
>   .../arch/x86/haswell/floating-point.json      |  129 +-
>   .../pmu-events/arch/x86/haswell/frontend.json |  362 +-
>   .../arch/x86/haswell/hsw-metrics.json         |  265 +-
>   .../pmu-events/arch/x86/haswell/memory.json   | 1004 ++--
>   .../pmu-events/arch/x86/haswell/other.json    |   40 +-
>   .../pmu-events/arch/x86/haswell/pipeline.json | 1796 +++----
>   .../arch/x86/haswell/uncore-cache.json        |  252 +
>   .../arch/x86/haswell/uncore-other.json        |   69 +
>   .../pmu-events/arch/x86/haswell/uncore.json   |  374 --
>   .../arch/x86/haswell/virtual-memory.json      |  552 +-
>   .../pmu-events/arch/x86/haswellx/cache.json   | 1434 ++---
>   .../arch/x86/haswellx/floating-point.json     |  116 +-
>   .../arch/x86/haswellx/frontend.json           |  336 +-
>   .../arch/x86/haswellx/hsx-metrics.json        |  263 +-
>   .../pmu-events/arch/x86/haswellx/memory.json  | 1070 ++--
>   .../pmu-events/arch/x86/haswellx/other.json   |   28 +-
>   .../arch/x86/haswellx/pipeline.json           | 1763 +++---
>   .../arch/x86/haswellx/virtual-memory.json     |  512 +-
>   .../pmu-events/arch/x86/icelake/cache.json    |  658 +--
>   .../arch/x86/icelake/floating-point.json      |   69 +-
>   .../pmu-events/arch/x86/icelake/frontend.json |  449 +-
>   .../arch/x86/icelake/icl-metrics.json         |  338 +-
>   .../pmu-events/arch/x86/icelake/memory.json   |  591 ++-
>   .../pmu-events/arch/x86/icelake/other.json    |  630 +--
>   .../pmu-events/arch/x86/icelake/pipeline.json | 1081 ++--
>   .../arch/x86/icelake/virtual-memory.json      |  178 +-
>   .../pmu-events/arch/x86/icelakex/cache.json   |  851 +--
>   .../arch/x86/icelakex/floating-point.json     |   51 +-
>   .../arch/x86/icelakex/frontend.json           |  501 +-
>   .../arch/x86/icelakex/icx-metrics.json        |  304 +-
>   .../pmu-events/arch/x86/icelakex/memory.json  |  601 ++-
>   .../pmu-events/arch/x86/icelakex/other.json   |  794 ++-
>   .../arch/x86/icelakex/pipeline.json           | 1112 ++--
>   .../arch/x86/icelakex/uncore-other.json       |   61 +-
>   .../arch/x86/icelakex/virtual-memory.json     |  150 +-
>   .../pmu-events/arch/x86/ivybridge/cache.json  | 1446 ++---
>   .../arch/x86/ivybridge/floating-point.json    |  212 +-
>   .../arch/x86/ivybridge/frontend.json          |  386 +-
>   .../arch/x86/ivybridge/ivb-metrics.json       |  287 +-
>   .../pmu-events/arch/x86/ivybridge/memory.json |  290 +-
>   .../pmu-events/arch/x86/ivybridge/other.json  |   42 +-
>   .../arch/x86/ivybridge/pipeline.json          | 1769 +++----
>   .../arch/x86/ivybridge/uncore-cache.json      |  252 +
>   .../arch/x86/ivybridge/uncore-other.json      |   91 +
>   .../pmu-events/arch/x86/ivybridge/uncore.json |  314 --
>   .../arch/x86/ivybridge/virtual-memory.json    |  208 +-
>   .../pmu-events/arch/x86/ivytown/cache.json    | 1594 +++---
>   .../arch/x86/ivytown/floating-point.json      |  212 +-
>   .../pmu-events/arch/x86/ivytown/frontend.json |  386 +-
>   .../arch/x86/ivytown/ivt-metrics.json         |  277 +-
>   .../pmu-events/arch/x86/ivytown/memory.json   |  562 +-
>   .../pmu-events/arch/x86/ivytown/other.json    |   42 +-
>   .../pmu-events/arch/x86/ivytown/pipeline.json | 1769 +++----
>   .../arch/x86/ivytown/virtual-memory.json      |  232 +-
>   .../pmu-events/arch/x86/jaketown/cache.json   | 1582 +++---
>   .../arch/x86/jaketown/floating-point.json     |  160 +-
>   .../arch/x86/jaketown/frontend.json           |  363 +-
>   .../arch/x86/jaketown/jkt-metrics.json        |  140 +-
>   .../pmu-events/arch/x86/jaketown/memory.json  |  478 +-
>   .../pmu-events/arch/x86/jaketown/other.json   |   58 +-
>   .../arch/x86/jaketown/pipeline.json           | 1556 +++---
>   .../arch/x86/jaketown/virtual-memory.json     |  178 +-
>   .../arch/x86/knightslanding/cache.json        | 2602 +++++----
>   .../x86/knightslanding/floating-point.json    |   29 +
>   .../arch/x86/knightslanding/frontend.json     |   48 +-
>   .../arch/x86/knightslanding/memory.json       | 1226 ++---
>   .../arch/x86/knightslanding/pipeline.json     |  465 +-
>   .../x86/knightslanding/virtual-memory.json    |   68 +-
>   .../pmu-events/arch/x86/nehalemep/cache.json  | 3062 +++++------
>   .../arch/x86/nehalemep/floating-point.json    |  180 +-
>   .../arch/x86/nehalemep/frontend.json          |   18 +-
>   .../pmu-events/arch/x86/nehalemep/memory.json |  670 +--
>   .../pmu-events/arch/x86/nehalemep/other.json  |  156 +-
>   .../arch/x86/nehalemep/pipeline.json          |  764 +--
>   .../arch/x86/nehalemep/virtual-memory.json    |   90 +-
>   .../arch/x86/sandybridge/cache.json           | 2298 ++++----
>   .../arch/x86/sandybridge/floating-point.json  |  172 +-
>   .../arch/x86/sandybridge/frontend.json        |  365 +-
>   .../arch/x86/sandybridge/memory.json          |  520 +-
>   .../arch/x86/sandybridge/other.json           |   66 +-
>   .../arch/x86/sandybridge/pipeline.json        | 1634 +++---
>   .../arch/x86/sandybridge/snb-metrics.json     |  150 +-
>   .../arch/x86/sandybridge/uncore-cache.json    |  252 +
>   .../arch/x86/sandybridge/uncore-other.json    |   91 +
>   .../arch/x86/sandybridge/uncore.json          |  314 --
>   .../arch/x86/sandybridge/virtual-memory.json  |  160 +-
>   .../pmu-events/arch/x86/silvermont/cache.json |  940 ++--
>   .../arch/x86/silvermont/floating-point.json   |   11 +
>   .../arch/x86/silvermont/frontend.json         |   75 +-
>   .../arch/x86/silvermont/memory.json           |    8 +-
>   .../pmu-events/arch/x86/silvermont/other.json |   20 +-
>   .../arch/x86/silvermont/pipeline.json         |  422 +-
>   .../arch/x86/silvermont/virtual-memory.json   |   76 +-
>   .../pmu-events/arch/x86/skylake/cache.json    | 2611 ++++-----
>   .../arch/x86/skylake/floating-point.json      |   48 +-
>   .../pmu-events/arch/x86/skylake/frontend.json |  578 +-
>   .../pmu-events/arch/x86/skylake/memory.json   | 1566 +++---
>   .../pmu-events/arch/x86/skylake/other.json    |   46 +-
>   .../pmu-events/arch/x86/skylake/pipeline.json | 1083 ++--
>   .../arch/x86/skylake/skl-metrics.json         |  497 +-
>   .../arch/x86/skylake/virtual-memory.json      |  274 +-
>   .../pmu-events/arch/x86/skylakex/cache.json   |  111 +-
>   .../arch/x86/skylakex/floating-point.json     |   24 +-
>   .../arch/x86/skylakex/frontend.json           |   18 +-
>   .../pmu-events/arch/x86/skylakex/memory.json  |   96 +-
>   .../arch/x86/skylakex/pipeline.json           |   11 +
>   .../arch/x86/skylakex/skx-metrics.json        |  461 +-
>   .../arch/x86/skylakex/uncore-other.json       |   23 +
>   .../pmu-events/arch/x86/tigerlake/cache.json  |   44 +-
>   .../arch/x86/tigerlake/floating-point.json    |   11 +-
>   .../arch/x86/tigerlake/frontend.json          |   17 +-
>   .../arch/x86/tigerlake/pipeline.json          |   37 +-
>   .../pmu-events/arch/x86/tremontx/cache.json   |  282 +-
>   .../arch/x86/tremontx/floating-point.json     |   24 +
>   .../arch/x86/tremontx/frontend.json           |   97 +-
>   .../pmu-events/arch/x86/tremontx/memory.json  |  449 +-
>   .../pmu-events/arch/x86/tremontx/other.json   | 1786 ++++++-
>   .../arch/x86/tremontx/pipeline.json           |  341 +-
>   .../arch/x86/tremontx/uncore-memory.json      |  156 +-
>   .../arch/x86/tremontx/uncore-other.json       | 2045 ++++++-
>   .../arch/x86/tremontx/virtual-memory.json     |  320 +-
>   .../arch/x86/westmereep-dp/cache.json         | 2734 +++++-----
>   .../x86/westmereep-dp/floating-point.json     |  180 +-
>   .../arch/x86/westmereep-dp/frontend.json      |   18 +-
>   .../arch/x86/westmereep-dp/memory.json        |  686 +--
>   .../arch/x86/westmereep-dp/other.json         |  238 +-
>   .../arch/x86/westmereep-dp/pipeline.json      |  780 +--
>   .../x86/westmereep-dp/virtual-memory.json     |  138 +-
>   .../arch/x86/westmereep-sp/cache.json         | 3142 +++++------
>   .../x86/westmereep-sp/floating-point.json     |  180 +-
>   .../arch/x86/westmereep-sp/frontend.json      |   18 +-
>   .../arch/x86/westmereep-sp/memory.json        |  670 +--
>   .../arch/x86/westmereep-sp/other.json         |  238 +-
>   .../arch/x86/westmereep-sp/pipeline.json      |  780 +--
>   .../x86/westmereep-sp/virtual-memory.json     |  120 +-
>   .../pmu-events/arch/x86/westmereex/cache.json | 3142 +++++------
>   .../arch/x86/westmereex/floating-point.json   |  180 +-
>   .../arch/x86/westmereex/frontend.json         |   18 +-
>   .../arch/x86/westmereex/memory.json           |  676 +--
>   .../pmu-events/arch/x86/westmereex/other.json |  238 +-
>   .../arch/x86/westmereex/pipeline.json         |  784 ++-
>   .../arch/x86/westmereex/virtual-memory.json   |  138 +-
>   tools/perf/tests/shell/stat_all_metrics.sh    |   10 +-
>   197 files changed, 61330 insertions(+), 52655 deletions(-)
>   create mode 100644 tools/perf/pmu-events/arch/x86/goldmont/floating-point.json
>   create mode 100644 tools/perf/pmu-events/arch/x86/goldmontplus/floating-point.json
>   create mode 100644 tools/perf/pmu-events/arch/x86/haswell/uncore-cache.json
>   create mode 100644 tools/perf/pmu-events/arch/x86/haswell/uncore-other.json
>   delete mode 100644 tools/perf/pmu-events/arch/x86/haswell/uncore.json
>   create mode 100644 tools/perf/pmu-events/arch/x86/ivybridge/uncore-cache.json
>   create mode 100644 tools/perf/pmu-events/arch/x86/ivybridge/uncore-other.json
>   delete mode 100644 tools/perf/pmu-events/arch/x86/ivybridge/uncore.json
>   create mode 100644 tools/perf/pmu-events/arch/x86/knightslanding/floating-point.json
>   create mode 100644 tools/perf/pmu-events/arch/x86/sandybridge/uncore-cache.json
>   create mode 100644 tools/perf/pmu-events/arch/x86/sandybridge/uncore-other.json
>   delete mode 100644 tools/perf/pmu-events/arch/x86/sandybridge/uncore.json
>   create mode 100644 tools/perf/pmu-events/arch/x86/silvermont/floating-point.json
>   create mode 100644 tools/perf/pmu-events/arch/x86/tremontx/floating-point.json
> 

^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2022-01-31 18:59 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2022-01-29  8:09 [PATCH 00/26] Update Intel events and metrics Ian Rogers
2022-01-29  8:09 ` [PATCH 01/26] perf test: Allow skip for all metrics test Ian Rogers
2022-01-29  8:09 ` [PATCH 23/26] perf vendor events: Update Tigerlake Ian Rogers
     [not found] ` <20220129080929.837293-4-irogers@google.com>
2022-01-31 13:53   ` [PATCH 03/26] perf vendor events: Update metrics for Broadwell DE Liang, Kan
2022-01-31 18:59     ` Ian Rogers
2022-01-31 14:04 ` [PATCH 00/26] Update Intel events and metrics Liang, Kan

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