From: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
To: Yicong Yang <yangyicong@hisilicon.com>
Cc: <gregkh@linuxfoundation.org>, <helgaas@kernel.org>,
<alexander.shishkin@linux.intel.com>, <lorenzo.pieralisi@arm.com>,
<will@kernel.org>, <mark.rutland@arm.com>,
<mathieu.poirier@linaro.org>, <suzuki.poulose@arm.com>,
<mike.leach@linaro.org>, <leo.yan@linaro.org>,
<daniel.thompson@linaro.org>, <joro@8bytes.org>,
<john.garry@huawei.com>, <shameerali.kolothum.thodi@huawei.com>,
<robin.murphy@arm.com>, <peterz@infradead.org>,
<mingo@redhat.com>, <acme@kernel.org>,
<linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<coresight@lists.linaro.org>, <linux-pci@vger.kernel.org>,
<linux-perf-users@vger.kernel.org>,
<iommu@lists.linux-foundation.org>, <prime.zeng@huawei.com>,
<liuqi115@huawei.com>, <zhangshaokun@hisilicon.com>,
<linuxarm@huawei.com>, <song.bao.hua@hisilicon.com>
Subject: Re: [PATCH v3 5/8] perf tool: Add support for HiSilicon PCIe Tune and Trace device driver
Date: Mon, 7 Feb 2022 11:55:31 +0000 [thread overview]
Message-ID: <20220207115531.0000392f@Huawei.com> (raw)
In-Reply-To: <20220124131118.17887-6-yangyicong@hisilicon.com>
On Mon, 24 Jan 2022 21:11:15 +0800
Yicong Yang <yangyicong@hisilicon.com> wrote:
> From: Qi Liu <liuqi115@huawei.com>
>
> 'perf record' and 'perf report --dump-raw-trace' supported in this
> patch.
>
> Example usage:
>
> Output will contain raw PTT data and its textual representation, such
> as:
>
> 0 0 0x5810 [0x30]: PERF_RECORD_AUXTRACE size: 0x400000 offset: 0
> ref: 0xa5d50c725 idx: 0 tid: -1 cpu: 0
> .
> . ... HISI PTT data: size 4194304 bytes
> . 00000000: 00 00 00 00 Prefix
> . 00000004: 08 20 00 60 Header DW0
> . 00000008: ff 02 00 01 Header DW1
> . 0000000c: 20 08 00 00 Header DW2
> . 00000010: 10 e7 44 ab Header DW3
> . 00000014: 2a a8 1e 01 Time
> . 00000020: 00 00 00 00 Prefix
> . 00000024: 01 00 00 60 Header DW0
> . 00000028: 0f 1e 00 01 Header DW1
> . 0000002c: 04 00 00 00 Header DW2
> . 00000030: 40 00 81 02 Header DW3
> . 00000034: ee 02 00 00 Time
> ....
>
> Signed-off-by: Qi Liu <liuqi115@huawei.com>
> Signed-off-by: Yicong Yang <yangyicong@hisilicon.com>
Hi. This is unfortunately out of my areas of expertise, so I just
took a quick glance and noticed one generic c thing that could be
tidied up.
> diff --git a/tools/perf/util/hisi_ptt.c b/tools/perf/util/hisi_ptt.c
> new file mode 100644
> index 000000000000..75fa89f3fae3
> --- /dev/null
> +++ b/tools/perf/util/hisi_ptt.c
...
> +
> +static void hisi_ptt_free_queue(void *priv)
> +{
> + struct hisi_ptt_queue *pttq = priv;
> +
> + if (!pttq)
> + return;
> +
> + free(pttq);
free() is safe against a null ptr, so you don't need the
if (!pttq) return;
See free(3) man page.
> +}
> +
> +static void hisi_ptt_free_events(struct perf_session *session)
> +{
> + struct hisi_ptt *ptt = container_of(session->auxtrace, struct hisi_ptt,
> + auxtrace);
> + struct auxtrace_queues *queues = &ptt->queues;
> + unsigned int i;
> +
> + for (i = 0; i < queues->nr_queues; i++) {
> + hisi_ptt_free_queue(queues->queue_array[i].priv);
> + queues->queue_array[i].priv = NULL;
> + }
> + auxtrace_queues__free(queues);
> +}
> +
next prev parent reply other threads:[~2022-02-07 13:13 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-24 13:11 [PATCH v3 0/8] Add support for HiSilicon PCIe Tune and Trace device Yicong Yang
2022-01-24 13:11 ` [PATCH v3 1/8] hwtracing: Add trace function " Yicong Yang
2022-02-07 11:42 ` Jonathan Cameron
2022-02-08 11:07 ` Yicong Yang
2022-02-14 12:51 ` Yicong Yang
2022-02-07 18:11 ` John Garry
2022-02-08 8:57 ` Yicong Yang
2022-01-24 13:11 ` [PATCH v3 2/8] hisi_ptt: Register PMU device for PTT trace Yicong Yang
2022-02-07 11:42 ` Jonathan Cameron
2022-02-08 7:41 ` Yicong Yang
2022-01-24 13:11 ` [PATCH v3 3/8] hisi_ptt: Add support for dynamically updating the filter list Yicong Yang
2022-01-24 13:11 ` [PATCH v3 4/8] hisi_ptt: Add tune function support for HiSilicon PCIe Tune and Trace device Yicong Yang
2022-02-07 11:49 ` Jonathan Cameron
2022-02-08 7:08 ` Yicong Yang
2022-01-24 13:11 ` [PATCH v3 5/8] perf tool: Add support for HiSilicon PCIe Tune and Trace device driver Yicong Yang
2022-02-07 11:55 ` Jonathan Cameron [this message]
2022-01-24 13:11 ` [PATCH v3 6/8] docs: Add HiSilicon PTT device driver documentation Yicong Yang
2022-02-07 12:12 ` Jonathan Cameron
2022-02-08 11:09 ` Yicong Yang
2022-01-24 13:11 ` [PATCH v3 7/8] MAINTAINERS: Add maintainer for HiSilicon PTT driver Yicong Yang
2022-01-24 13:11 ` [PATCH v3 8/8] iommu/arm-smmu-v3: Make default domain type of HiSilicon PTT device to identity Yicong Yang
2022-02-08 8:05 ` John Garry
2022-02-08 11:21 ` Yicong Yang
2022-02-08 11:56 ` John Garry
2022-02-08 12:20 ` Yicong Yang
2022-02-14 12:55 ` Yicong Yang
2022-02-15 13:00 ` Will Deacon
2022-02-15 13:30 ` Robin Murphy
2022-02-15 13:42 ` Will Deacon
2022-02-15 14:29 ` Robin Murphy
2022-02-16 9:35 ` Yicong Yang
2022-02-07 9:40 ` [PATCH v3 0/8] Add support for HiSilicon PCIe Tune and Trace device Yicong Yang
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