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From: Mike Leach <mike.leach@linaro.org>
To: suzuki.poulose@arm.com, coresight@lists.linaro.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Cc: mathieu.poirier@linaro.org, peterz@infradead.org,
	mingo@redhat.com, acme@kernel.org,
	linux-perf-users@vger.kernel.org, leo.yan@linaro.org,
	Mike Leach <mike.leach@linaro.org>
Subject: [PATCH 02/10] coresight: trace-id: Set up source trace ID map for system
Date: Tue,  8 Mar 2022 20:49:52 +0000	[thread overview]
Message-ID: <20220308205000.27646-3-mike.leach@linaro.org> (raw)
In-Reply-To: <20220308205000.27646-1-mike.leach@linaro.org>

Adds in a CoreSight trace ID map for the entire system.

This will be used by all source drivers to be allocated their trace IDs.

The checks for sources to have unique IDs has been removed - this is now
guaranteed by the ID allocation mechanisms, and inappropriate where
multiple ID maps are in use in larger systems

Signed-off-by: Mike Leach <mike.leach@linaro.org>
---
 drivers/hwtracing/coresight/coresight-core.c | 64 ++++++--------------
 drivers/hwtracing/coresight/coresight-priv.h |  1 +
 2 files changed, 20 insertions(+), 45 deletions(-)

diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtracing/coresight/coresight-core.c
index af00dca8d1ac..bbf415c252f9 100644
--- a/drivers/hwtracing/coresight/coresight-core.c
+++ b/drivers/hwtracing/coresight/coresight-core.c
@@ -22,6 +22,7 @@
 #include "coresight-etm-perf.h"
 #include "coresight-priv.h"
 #include "coresight-syscfg.h"
+#include "coresight-trace-id.h"
 
 static DEFINE_MUTEX(coresight_mutex);
 static DEFINE_PER_CPU(struct coresight_device *, csdev_sink);
@@ -50,6 +51,19 @@ static DEFINE_PER_CPU(struct list_head *, tracer_path);
  */
 static struct list_head *stm_path;
 
+/*
+ * Set up a global trace ID map.
+ * We may need a per sink ID map in future for larger / multi sink systems.
+ */
+static struct coresight_trace_id_map trace_id_map;
+
+/* Allow drivers to reference ID map when getting trace IDs */
+struct coresight_trace_id_map *coresight_get_trace_id_map(void)
+{
+	return &trace_id_map;
+}
+EXPORT_SYMBOL_GPL(coresight_get_trace_id_map);
+
 /*
  * When losing synchronisation a new barrier packet needs to be inserted at the
  * beginning of the data collected in a buffer.  That way the decoder knows that
@@ -84,45 +98,6 @@ struct coresight_device *coresight_get_percpu_sink(int cpu)
 }
 EXPORT_SYMBOL_GPL(coresight_get_percpu_sink);
 
-static int coresight_id_match(struct device *dev, void *data)
-{
-	int trace_id, i_trace_id;
-	struct coresight_device *csdev, *i_csdev;
-
-	csdev = data;
-	i_csdev = to_coresight_device(dev);
-
-	/*
-	 * No need to care about oneself and components that are not
-	 * sources or not enabled
-	 */
-	if (i_csdev == csdev || !i_csdev->enable ||
-	    i_csdev->type != CORESIGHT_DEV_TYPE_SOURCE)
-		return 0;
-
-	/* Get the source ID for both components */
-	trace_id = source_ops(csdev)->trace_id(csdev);
-	i_trace_id = source_ops(i_csdev)->trace_id(i_csdev);
-
-	/* All you need is one */
-	if (trace_id == i_trace_id)
-		return 1;
-
-	return 0;
-}
-
-static int coresight_source_is_unique(struct coresight_device *csdev)
-{
-	int trace_id = source_ops(csdev)->trace_id(csdev);
-
-	/* this shouldn't happen */
-	if (trace_id < 0)
-		return 0;
-
-	return !bus_for_each_dev(&coresight_bustype, NULL,
-				 csdev, coresight_id_match);
-}
-
 static int coresight_find_link_inport(struct coresight_device *csdev,
 				      struct coresight_device *parent)
 {
@@ -431,12 +406,6 @@ static int coresight_enable_source(struct coresight_device *csdev, u32 mode)
 {
 	int ret;
 
-	if (!coresight_source_is_unique(csdev)) {
-		dev_warn(&csdev->dev, "traceID %d not unique\n",
-			 source_ops(csdev)->trace_id(csdev));
-		return -EINVAL;
-	}
-
 	if (!csdev->enable) {
 		if (source_ops(csdev)->enable) {
 			ret = coresight_control_assoc_ectdev(csdev, true);
@@ -1763,11 +1732,15 @@ static int __init coresight_init(void)
 	if (ret)
 		goto exit_bus_unregister;
 
+	/* initialise the trace ID map */
+	coresight_trace_id_init_id_map(coresight_get_trace_id_map());
+
 	/* initialise the coresight syscfg API */
 	ret = cscfg_init();
 	if (!ret)
 		return 0;
 
+	coresight_trace_id_release_id_map(coresight_get_trace_id_map());
 	etm_perf_exit();
 exit_bus_unregister:
 	bus_unregister(&coresight_bustype);
@@ -1776,6 +1749,7 @@ static int __init coresight_init(void)
 
 static void __exit coresight_exit(void)
 {
+	coresight_trace_id_release_id_map(coresight_get_trace_id_map());
 	cscfg_exit();
 	etm_perf_exit();
 	bus_unregister(&coresight_bustype);
diff --git a/drivers/hwtracing/coresight/coresight-priv.h b/drivers/hwtracing/coresight/coresight-priv.h
index ff1dd2092ac5..d3032ac545c1 100644
--- a/drivers/hwtracing/coresight/coresight-priv.h
+++ b/drivers/hwtracing/coresight/coresight-priv.h
@@ -166,6 +166,7 @@ int coresight_make_links(struct coresight_device *orig,
 			 struct coresight_device *target);
 void coresight_remove_links(struct coresight_device *orig,
 			    struct coresight_connection *conn);
+struct coresight_trace_id_map *coresight_get_trace_id_map(void);
 
 #if IS_ENABLED(CONFIG_CORESIGHT_SOURCE_ETM3X)
 extern int etm_readl_cp14(u32 off, unsigned int *val);
-- 
2.17.1


  parent reply	other threads:[~2022-03-08 20:50 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-08 20:49 [PATCH 00/10] coresight: Add new API to allocate trace source ID values Mike Leach
2022-03-08 20:49 ` [PATCH 01/10] coresight: trace-id: Add API to dynamically assign trace " Mike Leach
2022-04-05 17:02   ` Mathieu Poirier
2022-04-06 19:45     ` Mike Leach
2022-04-07 18:08       ` Mathieu Poirier
2022-04-08 13:28         ` Mike Leach
2022-03-08 20:49 ` Mike Leach [this message]
2022-03-08 20:49 ` [PATCH 03/10] coresight: stm: Update STM driver to use Trace ID api Mike Leach
2022-03-08 20:49 ` [PATCH 04/10] coresight: etm4x: Use trace ID API to dynamically allocate trace ID Mike Leach
2022-04-05 17:25   ` Mathieu Poirier
2022-03-08 20:49 ` [PATCH 05/10] coresight: etm3x: Use trace ID API to allocate IDs Mike Leach
2022-04-05 17:22   ` Mathieu Poirier
2022-04-06 19:47     ` Mike Leach
2022-03-08 20:49 ` [PATCH 06/10] coresight: perf: traceid: Add perf notifiers for trace ID Mike Leach
2022-04-06 17:11   ` Mathieu Poirier
2022-04-06 19:38     ` Mike Leach
2022-04-07 17:46       ` Mathieu Poirier
2022-03-08 20:49 ` [PATCH 07/10] perf: cs-etm: Update event to read trace ID from sysfs Mike Leach
2022-03-08 20:49 ` [PATCH 08/10] coresight: Remove legacy Trace ID allocation mechanism Mike Leach
2022-05-17  3:56   ` liuqi (BA)
2022-05-18  9:07     ` Mike Leach
2022-03-08 20:49 ` [PATCH 09/10] coresight: etmX.X: stm: Remove unused legacy source trace ID ops Mike Leach
2022-03-08 20:50 ` [PATCH 10/10] coresight: trace-id: Add debug & test macros to trace id allocation Mike Leach
2022-03-22 10:43 ` [PATCH 00/10] coresight: Add new API to allocate trace source ID values Suzuki Kuruppassery Poulose
2022-03-22 11:38   ` Mike Leach
2022-03-22 12:35     ` Suzuki Kuruppassery Poulose
2022-03-22 14:27       ` Mike Leach
2022-03-22 18:52         ` Suzuki K Poulose
2022-03-23 10:07           ` Mike Leach
2022-03-23 10:35             ` Al Grant
2022-03-23 11:05               ` Mike Leach
2022-03-23 10:41             ` Suzuki Kuruppassery Poulose
2022-03-23 11:35               ` Mike Leach
2022-03-23 12:08                 ` Suzuki Kuruppassery Poulose
2022-04-04 16:15 ` Mathieu Poirier

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