From: Eric Lin <eric.lin@sifive.com>
To: peterz@infradead.org, mingo@redhat.com, acme@kernel.org,
mark.rutland@arm.com, alexander.shishkin@linux.intel.com,
jolsa@kernel.org, namhyung@kernel.org, palmer@dabbelt.com,
aou@eecs.berkeley.edu, iii@linux.ibm.com,
linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-riscv@lists.infradead.org
Cc: paul.walmsley@sifive.com, Eric Lin <eric.lin@sifive.com>
Subject: [PATCH v2 1/1] perf jitdump: Add riscv64 support.
Date: Mon, 11 Apr 2022 18:54:38 +0800 [thread overview]
Message-ID: <20220411105438.21366-2-eric.lin@sifive.com> (raw)
In-Reply-To: <20220411105438.21366-1-eric.lin@sifive.com>
This patch enable perf jitdump for riscv64 and it tested with V8 on qemu rv64.
Qemu rv64:
$ perf record -e cpu-clock -c 1000 -g -k mono ./d8_rv64 --perf-prof --no-write-protect-code-memory test.js
$ perf inject -j -i perf.data -o perf.data.jitted
$ perf report -i perf.data.jitted
Output:
To display the perf.data header info, please use --header/--header-only options.
Total Lost Samples: 0
Samples: 87K of event 'cpu-clock'
Event count (approx.): 87974000
Children Self Command Shared Object Symbol
....
0.28% 0.06% d8_rv64 d8_rv64 [.] _ZN2v88i
nternal6WasmJs7InstallEPNS0_7IsolateEb
0.28% 0.00% d8_rv64 d8_rv64 [.] _ZN2v88i
nternal10ParserBaseINS0_6ParserEE22ParseLogicalExpressionEv
0.28% 0.03% d8_rv64 jitted-112-76.so [.] Builtin:
InterpreterEntryTrampoline
0.12% 0.00% d8_rv64 d8_rv64 [.] _ZN2v88i
nternal19ContextDeserializer11DeserializeEPNS0_7IsolateENS0_6HandleINS0_13JSGlob
alProxyEEENS_33DeserializeInternalFieldsCallbackE
0.12% 0.01% d8_rv64 jitted-112-651.so [.] Builtin:
CEntry_Return1_DontSaveFPRegs_ArgvOnStack_NoBuiltinExit
....
Signed-off-by: Eric Lin <eric.lin@sifive.com>
---
tools/perf/arch/riscv/Makefile | 1 +
tools/perf/util/genelf.h | 3 +++
2 files changed, 4 insertions(+)
diff --git a/tools/perf/arch/riscv/Makefile b/tools/perf/arch/riscv/Makefile
index 1aa9dd772489..a8d25d005207 100644
--- a/tools/perf/arch/riscv/Makefile
+++ b/tools/perf/arch/riscv/Makefile
@@ -2,3 +2,4 @@ ifndef NO_DWARF
PERF_HAVE_DWARF_REGS := 1
endif
PERF_HAVE_ARCH_REGS_QUERY_REGISTER_OFFSET := 1
+PERF_HAVE_JITDUMP := 1
diff --git a/tools/perf/util/genelf.h b/tools/perf/util/genelf.h
index 3db3293213a9..ae138afe6c56 100644
--- a/tools/perf/util/genelf.h
+++ b/tools/perf/util/genelf.h
@@ -38,6 +38,9 @@ int jit_add_debug_info(Elf *e, uint64_t code_addr, void *debug, int nr_debug_ent
#elif defined(__s390x__)
#define GEN_ELF_ARCH EM_S390
#define GEN_ELF_CLASS ELFCLASS64
+#elif defined(__riscv) && __riscv_xlen == 64
+#define GEN_ELF_ARCH EM_RISCV
+#define GEN_ELF_CLASS ELFCLASS64
#else
#error "unsupported architecture"
#endif
--
2.35.1
next prev parent reply other threads:[~2022-04-11 10:55 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-11 10:54 [PATCH v2 0/1] perf jitdump: Add riscv64 support Eric Lin
2022-04-11 10:54 ` Eric Lin [this message]
2022-04-11 19:40 ` [PATCH v2 1/1] " Arnaldo Carvalho de Melo
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