From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4E95AC433EF for ; Tue, 19 Apr 2022 01:21:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239115AbiDSBYF (ORCPT ); Mon, 18 Apr 2022 21:24:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36238 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231862AbiDSBYC (ORCPT ); Mon, 18 Apr 2022 21:24:02 -0400 Received: from mail-ej1-x62f.google.com (mail-ej1-x62f.google.com [IPv6:2a00:1450:4864:20::62f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 92D962717A for ; Mon, 18 Apr 2022 18:21:21 -0700 (PDT) Received: by mail-ej1-x62f.google.com with SMTP id t11so29851334eju.13 for ; Mon, 18 Apr 2022 18:21:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=zxbQ6TRPNn9gexb0jaIoX0c5WCAB0YeHHh5XcVddlu4=; b=kUEg6N6xcZzu6vy23WArx+eRurR58Zws4VxetIoj7RYKnV/b97rc954MFQJvofcy6z /v+kBQ2M2XVZHnrzej9b3KWSchdiXfLUXlRoebxpJR4Ud+JqzAMNPlZlIvloTDX9SvSs goD3bIlVMMK0TecPMWAG/pVf/CGPh+Red09LmHLo8InfAzqkb51v3+VMcQp1Xlyp6QJO E8goocgcYGWCi/0tPcoXu+fnBijeXF0P3mvWLRi/8yvo9bmrEdRhVRZdYHnqFOtSwkey JQk6WdllD/yOUCd+6GRXnaGxLmws+bcUp96IOdozXA/N/BvSPmB+RqJHHMsqFn2X/9Ah WEQQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=zxbQ6TRPNn9gexb0jaIoX0c5WCAB0YeHHh5XcVddlu4=; b=A/Kq4IxK8uGaKCQSct9sGlk+3r9LNslFPhp0NOEOcT54xFf9VJFDvvtj43HjQYqN9F Vgu91ux046mf9Bk601g9l4S0cu7dj2yyeVsK3tJKjFqZUykWBR7lTqCQQG83t9Cn7Ost OLLNGNqBUreHAjd/ds/Hvv5fitjfUVHmifxNpn0nQzvIrNh0gcBWoQQxOEbBavyWGm2V vANCspQD+18C8Iw26jm0US1bWAsqpuvDThxbwLWod+qreS6Cx7r755uOQB7uxxY9cs64 V2LTMmiyHjhG7edmXFEe2NyaGMG/2TqNjYvW4XUQRgsOGMrQ9EjjFXj/zxKe3X6p8EXO DLDg== X-Gm-Message-State: AOAM5333jpxa0nW0aBlHlwU+9kOlsf3yq1ujTcwVSxCaTymqBumIkzFD MNkN5lp1MbvaQ5O+L6EPBgmq+w== X-Google-Smtp-Source: ABdhPJziwyj2afz/fzBMlMpMXsEiyH76Q2F7T1jddYljRwBxHA9iyxPKtGshpN6XD5v9WsIB64K6zw== X-Received: by 2002:a17:907:7f88:b0:6ef:e068:f5aa with SMTP id qk8-20020a1709077f8800b006efe068f5aamr390588ejc.238.1650331279998; Mon, 18 Apr 2022 18:21:19 -0700 (PDT) Received: from leoy-ThinkPad-X240s ([104.245.96.34]) by smtp.gmail.com with ESMTPSA id b25-20020a056402139900b0041904036ab1sm7838317edv.5.2022.04.18.18.21.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 18 Apr 2022 18:21:19 -0700 (PDT) Date: Tue, 19 Apr 2022 09:21:14 +0800 From: Leo Yan To: Arnaldo Carvalho de Melo Cc: Peter Zijlstra , Ingo Molnar , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Ravi Bangoria , James Clark , German Gomez , linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v3] perf report: Set PERF_SAMPLE_DATA_SRC bit for Arm SPE event Message-ID: <20220419012114.GF166256@leoy-ThinkPad-X240s> References: <20220414123201.842754-1-leo.yan@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-perf-users@vger.kernel.org On Mon, Apr 18, 2022 at 06:56:26PM -0300, Arnaldo Carvalho de Melo wrote: > Em Thu, Apr 14, 2022 at 08:32:01PM +0800, Leo Yan escreveu: > > Since commit bb30acae4c4d ("perf report: Bail out --mem-mode if mem info > > is not available") "perf mem report" and "perf report --mem-mode" > > don't report result if the PERF_SAMPLE_DATA_SRC bit is missed in sample > > type. > > > > The commit ffab48705205 ("perf: arm-spe: Fix perf report --mem-mode") > > partially fixes the issue. It adds PERF_SAMPLE_DATA_SRC bit for Arm SPE > > event, this allows the perf data file generated by kernel v5.18-rc1 or > > later version can be reported properly. > > > > On the other hand, perf tool still fails to be backward compatibility > > for a data file recorded by an older version's perf which contains Arm > > SPE trace data. This patch is a workaround in reporting phase, when > > detects ARM SPE PMU event and without PERF_SAMPLE_DATA_SRC bit, it will > > force to set the bit in the sample type and give a warning info. > > Thanks, applied. Thank you, Arnaldo! Leo