* [PATCH] perf mem: Trace physical address for Arm SPE events
@ 2022-05-30 8:36 Leo Yan
2022-05-31 22:25 ` Namhyung Kim
0 siblings, 1 reply; 2+ messages in thread
From: Leo Yan @ 2022-05-30 8:36 UTC (permalink / raw)
To: Arnaldo Carvalho de Melo, James Clark, John Garry, Will Deacon,
Mike Leach, Peter Zijlstra, Ingo Molnar, Mark Rutland,
Alexander Shishkin, Jiri Olsa, Namhyung Kim, German Gomez,
linux-arm-kernel, linux-perf-users, linux-kernel
Cc: Leo Yan
Currently, Arm SPE events don't trace physical address, therefore, the
field 'phys_addr' is always zero in synthesized memory samples. This
leads to perf c2c tool cannot locate the memory node for samples.
This patch enables configuration 'pa_enable' for Arm SPE events, so the
physical address packet can be traced, finally this can allow perf c2c
tool to locate properly for memory node.
Signed-off-by: Leo Yan <leo.yan@linaro.org>
---
tools/perf/arch/arm64/util/mem-events.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/tools/perf/arch/arm64/util/mem-events.c b/tools/perf/arch/arm64/util/mem-events.c
index be41721b9aa1..df817d1f9f3e 100644
--- a/tools/perf/arch/arm64/util/mem-events.c
+++ b/tools/perf/arch/arm64/util/mem-events.c
@@ -5,9 +5,9 @@
#define E(t, n, s) { .tag = t, .name = n, .sysfs_name = s }
static struct perf_mem_event perf_mem_events[PERF_MEM_EVENTS__MAX] = {
- E("spe-load", "arm_spe_0/ts_enable=1,load_filter=1,store_filter=0,min_latency=%u/", "arm_spe_0"),
- E("spe-store", "arm_spe_0/ts_enable=1,load_filter=0,store_filter=1/", "arm_spe_0"),
- E("spe-ldst", "arm_spe_0/ts_enable=1,load_filter=1,store_filter=1,min_latency=%u/", "arm_spe_0"),
+ E("spe-load", "arm_spe_0/ts_enable=1,pa_enable=1,load_filter=1,store_filter=0,min_latency=%u/", "arm_spe_0"),
+ E("spe-store", "arm_spe_0/ts_enable=1,pa_enable=1,load_filter=0,store_filter=1/", "arm_spe_0"),
+ E("spe-ldst", "arm_spe_0/ts_enable=1,pa_enable=1,load_filter=1,store_filter=1,min_latency=%u/", "arm_spe_0"),
};
static char mem_ev_name[100];
--
2.25.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] perf mem: Trace physical address for Arm SPE events
2022-05-30 8:36 [PATCH] perf mem: Trace physical address for Arm SPE events Leo Yan
@ 2022-05-31 22:25 ` Namhyung Kim
0 siblings, 0 replies; 2+ messages in thread
From: Namhyung Kim @ 2022-05-31 22:25 UTC (permalink / raw)
To: Leo Yan
Cc: Arnaldo Carvalho de Melo, James Clark, John Garry, Will Deacon,
Mike Leach, Peter Zijlstra, Ingo Molnar, Mark Rutland,
Alexander Shishkin, Jiri Olsa, German Gomez, linux-arm-kernel,
linux-perf-users, linux-kernel
Hi Leo,
On Mon, May 30, 2022 at 1:37 AM Leo Yan <leo.yan@linaro.org> wrote:
>
> Currently, Arm SPE events don't trace physical address, therefore, the
> field 'phys_addr' is always zero in synthesized memory samples. This
> leads to perf c2c tool cannot locate the memory node for samples.
>
> This patch enables configuration 'pa_enable' for Arm SPE events, so the
> physical address packet can be traced, finally this can allow perf c2c
> tool to locate properly for memory node.
>
> Signed-off-by: Leo Yan <leo.yan@linaro.org>
Acked-by: Namhyung Kim <namhyung@kernel.org>
> ---
> tools/perf/arch/arm64/util/mem-events.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/tools/perf/arch/arm64/util/mem-events.c b/tools/perf/arch/arm64/util/mem-events.c
> index be41721b9aa1..df817d1f9f3e 100644
> --- a/tools/perf/arch/arm64/util/mem-events.c
> +++ b/tools/perf/arch/arm64/util/mem-events.c
> @@ -5,9 +5,9 @@
> #define E(t, n, s) { .tag = t, .name = n, .sysfs_name = s }
>
> static struct perf_mem_event perf_mem_events[PERF_MEM_EVENTS__MAX] = {
> - E("spe-load", "arm_spe_0/ts_enable=1,load_filter=1,store_filter=0,min_latency=%u/", "arm_spe_0"),
> - E("spe-store", "arm_spe_0/ts_enable=1,load_filter=0,store_filter=1/", "arm_spe_0"),
> - E("spe-ldst", "arm_spe_0/ts_enable=1,load_filter=1,store_filter=1,min_latency=%u/", "arm_spe_0"),
> + E("spe-load", "arm_spe_0/ts_enable=1,pa_enable=1,load_filter=1,store_filter=0,min_latency=%u/", "arm_spe_0"),
> + E("spe-store", "arm_spe_0/ts_enable=1,pa_enable=1,load_filter=0,store_filter=1/", "arm_spe_0"),
> + E("spe-ldst", "arm_spe_0/ts_enable=1,pa_enable=1,load_filter=1,store_filter=1,min_latency=%u/", "arm_spe_0"),
Unrelated, but is there "arm_spe_1" or others?
Thanks,
Namhyung
> };
>
> static char mem_ev_name[100];
> --
> 2.25.1
>
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