From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9DA98C43334 for ; Thu, 21 Jul 2022 06:56:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231443AbiGUG4a (ORCPT ); Thu, 21 Jul 2022 02:56:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42332 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231455AbiGUG4a (ORCPT ); Thu, 21 Jul 2022 02:56:30 -0400 Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2A2E2252A6; Wed, 20 Jul 2022 23:56:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1658386589; x=1689922589; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=idkTLGbKPUiDTYRJFcHIDIEsGL74hKW8VjJcAUjopCU=; b=biDIvctrtDskcU7xtqti9yZXo444ZMFa56ZzdsUgs7UJOL9Xce00NpoK vrM7+Mkf/MP6py/PM6zfkXWQUB1kPEmtVjTaiXESJqAHY1DHASwlk6GTq Lra/p1bExy+oPH/UQXXUcZ73iiiLLcsaPXfgZogPuud1QO/MyHkZYP+m4 uzi40VP5oyWX0iXCyV53o2FhA3rey/pHfYhUNRn9sYZRlq/NxOBwUjpiT ChnsAD1YE2PMyRr6cGrMoI5hEoi/TKX+u5NZck8y2MjR8PInu9s7xetkH 5AW/wBNBjnDamTsOs7TgP52ydGkcnvKf06wqqlyWNOtc/88oH2A/hF5St w==; X-IronPort-AV: E=McAfee;i="6400,9594,10414"; a="285732483" X-IronPort-AV: E=Sophos;i="5.92,288,1650956400"; d="scan'208";a="285732483" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Jul 2022 23:56:29 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.92,288,1650956400"; d="scan'208";a="602217313" Received: from zxingrtx.sh.intel.com ([10.239.159.110]) by fmsmga007.fm.intel.com with ESMTP; 20 Jul 2022 23:56:26 -0700 From: zhengjun.xing@linux.intel.com To: acme@kernel.org, peterz@infradead.org, mingo@redhat.com, alexander.shishkin@intel.com, jolsa@kernel.org, namhyung@kernel.org Cc: linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org, irogers@google.com, ak@linux.intel.com, kan.liang@linux.intel.com, zhengjun.xing@linux.intel.com Subject: [PATCH v4 1/5] perf stat: Revert "perf stat: Add default hybrid events" Date: Thu, 21 Jul 2022 14:57:02 +0800 Message-Id: <20220721065706.2886112-2-zhengjun.xing@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220721065706.2886112-1-zhengjun.xing@linux.intel.com> References: <20220721065706.2886112-1-zhengjun.xing@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-perf-users@vger.kernel.org From: Kan Liang This reverts commit ac2dc29edd21 ("perf stat: Add default hybrid events"). Between this patch and the reverted patch, the commit 6c1912898ed2 ("perf parse-events: Rename parse_events_error functions") and the commit 07eafd4e053a ("perf parse-event: Add init and exit to parse_event_error") clean up the parse_events_error_*() codes. The related change is also reverted. The reverted patch is hard to be extended to support new default events, e.g., Topdown events, and the existing "--detailed" option on a hybrid platform. A new solution will be proposed in the following patch to enable the perf stat default on a hybrid platform. Signed-off-by: Kan Liang Signed-off-by: Zhengjun Xing Acked-by: Namhyung Kim --- Change log: v4: * Adds Acked-by from Namhyung Kim v3: * no change since v1. tools/perf/builtin-stat.c | 30 ------------------------------ 1 file changed, 30 deletions(-) diff --git a/tools/perf/builtin-stat.c b/tools/perf/builtin-stat.c index 4ce87a8eb7d7..6ac79d95f3b5 100644 --- a/tools/perf/builtin-stat.c +++ b/tools/perf/builtin-stat.c @@ -1685,12 +1685,6 @@ static int add_default_attributes(void) { .type = PERF_TYPE_HARDWARE, .config = PERF_COUNT_HW_BRANCH_INSTRUCTIONS }, { .type = PERF_TYPE_HARDWARE, .config = PERF_COUNT_HW_BRANCH_MISSES }, -}; - struct perf_event_attr default_sw_attrs[] = { - { .type = PERF_TYPE_SOFTWARE, .config = PERF_COUNT_SW_TASK_CLOCK }, - { .type = PERF_TYPE_SOFTWARE, .config = PERF_COUNT_SW_CONTEXT_SWITCHES }, - { .type = PERF_TYPE_SOFTWARE, .config = PERF_COUNT_SW_CPU_MIGRATIONS }, - { .type = PERF_TYPE_SOFTWARE, .config = PERF_COUNT_SW_PAGE_FAULTS }, }; /* @@ -1947,30 +1941,6 @@ static int add_default_attributes(void) } if (!evsel_list->core.nr_entries) { - if (perf_pmu__has_hybrid()) { - struct parse_events_error errinfo; - const char *hybrid_str = "cycles,instructions,branches,branch-misses"; - - if (target__has_cpu(&target)) - default_sw_attrs[0].config = PERF_COUNT_SW_CPU_CLOCK; - - if (evlist__add_default_attrs(evsel_list, - default_sw_attrs) < 0) { - return -1; - } - - parse_events_error__init(&errinfo); - err = parse_events(evsel_list, hybrid_str, &errinfo); - if (err) { - fprintf(stderr, - "Cannot set up hybrid events %s: %d\n", - hybrid_str, err); - parse_events_error__print(&errinfo, hybrid_str); - } - parse_events_error__exit(&errinfo); - return err ? -1 : 0; - } - if (target__has_cpu(&target)) default_attrs0[0].config = PERF_COUNT_SW_CPU_CLOCK; -- 2.25.1