* [PATCH AUTOSEL 6.1 05/20] perf/x86/intel: Add Emerald Rapids
[not found] <20230131145946.1249850-1-sashal@kernel.org>
@ 2023-01-31 14:59 ` Sasha Levin
2023-01-31 14:59 ` [PATCH AUTOSEL 6.1 06/20] perf/x86/intel/cstate: " Sasha Levin
1 sibling, 0 replies; 2+ messages in thread
From: Sasha Levin @ 2023-01-31 14:59 UTC (permalink / raw)
To: linux-kernel, stable
Cc: Kan Liang, Ingo Molnar, Sasha Levin, peterz, mingo, acme, tglx,
bp, dave.hansen, x86, linux-perf-users
From: Kan Liang <kan.liang@linux.intel.com>
[ Upstream commit 6795e558e9cc6123c24e2100a2ebe88e58a792bc ]
From core PMU's perspective, Emerald Rapids is the same as the Sapphire
Rapids. The only difference is the event list, which will be
supported in the perf tool later.
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Link: https://lore.kernel.org/r/20230106160449.3566477-1-kan.liang@linux.intel.com
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
arch/x86/events/intel/core.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index 1b92bf05fd65..5a1d0ea402e4 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -6342,6 +6342,7 @@ __init int intel_pmu_init(void)
break;
case INTEL_FAM6_SAPPHIRERAPIDS_X:
+ case INTEL_FAM6_EMERALDRAPIDS_X:
pmem = true;
x86_pmu.late_ack = true;
memcpy(hw_cache_event_ids, spr_hw_cache_event_ids, sizeof(hw_cache_event_ids));
--
2.39.0
^ permalink raw reply related [flat|nested] 2+ messages in thread* [PATCH AUTOSEL 6.1 06/20] perf/x86/intel/cstate: Add Emerald Rapids
[not found] <20230131145946.1249850-1-sashal@kernel.org>
2023-01-31 14:59 ` [PATCH AUTOSEL 6.1 05/20] perf/x86/intel: Add Emerald Rapids Sasha Levin
@ 2023-01-31 14:59 ` Sasha Levin
1 sibling, 0 replies; 2+ messages in thread
From: Sasha Levin @ 2023-01-31 14:59 UTC (permalink / raw)
To: linux-kernel, stable
Cc: Kan Liang, Ingo Molnar, Sasha Levin, peterz, mingo, acme, tglx,
bp, dave.hansen, x86, linux-perf-users
From: Kan Liang <kan.liang@linux.intel.com>
[ Upstream commit 5a8a05f165fb18d37526062419774d9088c2a9b9 ]
From the perspective of Intel cstate residency counters,
Emerald Rapids is the same as the Sapphire Rapids and Ice Lake.
Add Emerald Rapids model.
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Link: https://lore.kernel.org/r/20230106160449.3566477-2-kan.liang@linux.intel.com
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
arch/x86/events/intel/cstate.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/x86/events/intel/cstate.c b/arch/x86/events/intel/cstate.c
index a2834bc93149..181ae3f47dfd 100644
--- a/arch/x86/events/intel/cstate.c
+++ b/arch/x86/events/intel/cstate.c
@@ -676,6 +676,7 @@ static const struct x86_cpu_id intel_cstates_match[] __initconst = {
X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_X, &icx_cstates),
X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_D, &icx_cstates),
X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X, &icx_cstates),
+ X86_MATCH_INTEL_FAM6_MODEL(EMERALDRAPIDS_X, &icx_cstates),
X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE_L, &icl_cstates),
X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE, &icl_cstates),
--
2.39.0
^ permalink raw reply related [flat|nested] 2+ messages in thread