From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3745CC77B70 for ; Mon, 3 Apr 2023 15:50:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232642AbjDCPuW (ORCPT ); Mon, 3 Apr 2023 11:50:22 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60086 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232617AbjDCPuL (ORCPT ); Mon, 3 Apr 2023 11:50:11 -0400 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 39C0030EB; Mon, 3 Apr 2023 08:49:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1680536992; x=1712072992; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=RVH6nOCjK5mMwmhujxNK93yJbU7YNiX2duZPr3uivlw=; b=Q8y6LB/BTitfG1C0Yjbv5LG7SL+RWxRj2lQWUwhdz1fJ3KcIt9Pl5Xb5 MD/FHRlGaU6KoVKmjFxXP8L9rHIOZA+JPqKgtWasLr1ZXtBgakVf3huJZ gsKmC2eeJVerMoLruUe9Zdi8ABhlHinyaozPfKHCvh/WAryD2a8Qq8CYi fnAhv751cX8ZGYyryGPXWs1AB2UFoFxMH54feJ+zbs5RUFHhcu0KtHi67 W7/X3wu3hJ+aPMv3/GKP1DELA1ECpvn+cNvQlq0lJLVH0a/Jy1uLenS8F 7dZr+igpOI7ULOylEUMxY4ISYD1Bav2K5dwWMQpAmbpkWO31jAguHYuJj A==; X-IronPort-AV: E=McAfee;i="6600,9927,10669"; a="339430321" X-IronPort-AV: E=Sophos;i="5.98,315,1673942400"; d="scan'208";a="339430321" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Apr 2023 08:48:49 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10669"; a="663243337" X-IronPort-AV: E=Sophos;i="5.98,315,1673942400"; d="scan'208";a="663243337" Received: from ahunter6-mobl1.ger.corp.intel.com (HELO ahunter-VirtualBox.home\044ger.corp.intel.com) ([10.252.40.243]) by orsmga006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Apr 2023 08:48:47 -0700 From: Adrian Hunter To: Arnaldo Carvalho de Melo Cc: Jiri Olsa , Namhyung Kim , Ian Rogers , linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org Subject: [PATCH 2/2] perf intel-pt: Fix CYC timestamps after standalone CBR Date: Mon, 3 Apr 2023 18:48:31 +0300 Message-Id: <20230403154831.8651-3-adrian.hunter@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230403154831.8651-1-adrian.hunter@intel.com> References: <20230403154831.8651-1-adrian.hunter@intel.com> MIME-Version: 1.0 Organization: Intel Finland Oy, Registered Address: PL 281, 00181 Helsinki, Business Identity Code: 0357606 - 4, Domiciled in Helsinki Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-perf-users@vger.kernel.org After a standalone CBR (not associated with TSC), update the cycles reference timestamp and reset the cycle count, so that CYC timestamps are calculated relative to that point with the new frequency. Fixes: cc33618619ce ("perf tools: Add Intel PT support for decoding CYC packets") Cc: stable@vger.kernel.org Signed-off-by: Adrian Hunter --- tools/perf/util/intel-pt-decoder/intel-pt-decoder.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c b/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c index 0ac860c8dd2b..7145c5890de0 100644 --- a/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c +++ b/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c @@ -1998,6 +1998,8 @@ static void intel_pt_calc_cbr(struct intel_pt_decoder *decoder) decoder->cbr = cbr; decoder->cbr_cyc_to_tsc = decoder->max_non_turbo_ratio_fp / cbr; + decoder->cyc_ref_timestamp = decoder->timestamp; + decoder->cycle_cnt = 0; intel_pt_mtc_cyc_cnt_cbr(decoder); } -- 2.34.1