From: Ian Rogers <irogers@google.com>
To: Arnaldo Carvalho de Melo <acme@kernel.org>,
Kan Liang <kan.liang@linux.intel.com>,
Ahmad Yasin <ahmad.yasin@intel.com>,
Peter Zijlstra <peterz@infradead.org>,
Ingo Molnar <mingo@redhat.com>,
Stephane Eranian <eranian@google.com>,
Andi Kleen <ak@linux.intel.com>,
Perry Taylor <perry.taylor@intel.com>,
Samantha Alt <samantha.alt@intel.com>,
Caleb Biggers <caleb.biggers@intel.com>,
Weilin Wang <weilin.wang@intel.com>,
Edward Baker <edward.baker@intel.com>,
Mark Rutland <mark.rutland@arm.com>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Jiri Olsa <jolsa@kernel.org>, Namhyung Kim <namhyung@kernel.org>,
Adrian Hunter <adrian.hunter@intel.com>,
Florian Fischer <florian.fischer@muhq.space>,
Rob Herring <robh@kernel.org>,
Zhengjun Xing <zhengjun.xing@linux.intel.com>,
John Garry <john.g.garry@oracle.com>,
Kajol Jain <kjain@linux.ibm.com>,
Sumanth Korikkar <sumanthk@linux.ibm.com>,
Thomas Richter <tmricht@linux.ibm.com>,
Tiezhu Yang <yangtiezhu@loongson.cn>,
Ravi Bangoria <ravi.bangoria@amd.com>,
Leo Yan <leo.yan@linaro.org>,
Yang Jihong <yangjihong1@huawei.com>,
James Clark <james.clark@arm.com>,
Suzuki Poulouse <suzuki.poulose@arm.com>,
Kang Minchul <tegongkang@gmail.com>,
Athira Rajeev <atrajeev@linux.vnet.ibm.com>,
linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org
Cc: Ian Rogers <irogers@google.com>
Subject: [PATCH v2 05/43] perf vendor events intel: Add icelake metric constraints
Date: Fri, 28 Apr 2023 00:37:31 -0700 [thread overview]
Message-ID: <20230428073809.1803624-6-irogers@google.com> (raw)
In-Reply-To: <20230428073809.1803624-1-irogers@google.com>
Previously these constraints were disabled as they contained topdown
events. Since:
https://lore.kernel.org/all/20230312021543.3060328-9-irogers@google.com/
the topdown events are correctly grouped even if no group exists.
This change was created by PR:
https://github.com/intel/perfmon/pull/71
Signed-off-by: Ian Rogers <irogers@google.com>
---
.../perf/pmu-events/arch/x86/icelake/icl-metrics.json | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/tools/perf/pmu-events/arch/x86/icelake/icl-metrics.json b/tools/perf/pmu-events/arch/x86/icelake/icl-metrics.json
index 1a2154f28b7b..ae8a96ec7fa5 100644
--- a/tools/perf/pmu-events/arch/x86/icelake/icl-metrics.json
+++ b/tools/perf/pmu-events/arch/x86/icelake/icl-metrics.json
@@ -317,6 +317,7 @@
},
{
"BriefDescription": "This metric represents overall arithmetic floating-point (FP) operations fraction the CPU has executed (retired)",
+ "MetricConstraint": "NO_GROUP_EVENTS",
"MetricExpr": "tma_x87_use + tma_fp_scalar + tma_fp_vector",
"MetricGroup": "HPC;TopdownL3;tma_L3_group;tma_light_operations_group",
"MetricName": "tma_fp_arith",
@@ -421,6 +422,7 @@
},
{
"BriefDescription": "Branch Misprediction Cost: Fraction of TMA slots wasted per non-speculative branch misprediction (retired JEClear)",
+ "MetricConstraint": "NO_GROUP_EVENTS",
"MetricExpr": "(tma_branch_mispredicts + tma_fetch_latency * tma_mispredicts_resteers / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches)) * tma_info_slots / BR_MISP_RETIRED.ALL_BRANCHES",
"MetricGroup": "Bad;BrMispredicts;tma_issueBM",
"MetricName": "tma_info_branch_misprediction_cost",
@@ -466,6 +468,7 @@
},
{
"BriefDescription": "Probability of Core Bound bottleneck hidden by SMT-profiling artifacts",
+ "MetricConstraint": "NO_GROUP_EVENTS",
"MetricExpr": "(100 * (1 - tma_core_bound / tma_ports_utilization if tma_core_bound < tma_ports_utilization else 1) if tma_info_smt_2t_utilization > 0.5 else 0)",
"MetricGroup": "Cor;SMT",
"MetricName": "tma_info_core_bound_likely",
@@ -518,6 +521,7 @@
},
{
"BriefDescription": "Total pipeline cost of DSB (uop cache) misses - subset of the Instruction_Fetch_BW Bottleneck",
+ "MetricConstraint": "NO_GROUP_EVENTS",
"MetricExpr": "100 * (tma_fetch_latency * tma_dsb_switches / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches) + tma_fetch_bandwidth * tma_mite / (tma_dsb + tma_lsd + tma_mite))",
"MetricGroup": "DSBmiss;Fed;tma_issueFB",
"MetricName": "tma_info_dsb_misses",
@@ -599,6 +603,7 @@
},
{
"BriefDescription": "Total pipeline cost of instruction fetch bandwidth related bottlenecks",
+ "MetricConstraint": "NO_GROUP_EVENTS",
"MetricExpr": "100 * (tma_frontend_bound - tma_fetch_latency * tma_mispredicts_resteers / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches)) - tma_info_big_code",
"MetricGroup": "Fed;FetchBW;Frontend",
"MetricName": "tma_info_instruction_fetch_bw",
@@ -937,6 +942,7 @@
},
{
"BriefDescription": "Total pipeline cost of Memory Address Translation related bottlenecks (data-side TLBs)",
+ "MetricConstraint": "NO_GROUP_EVENTS",
"MetricExpr": "100 * tma_memory_bound * (tma_l1_bound / max(tma_memory_bound, tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) * (tma_dtlb_load / max(tma_l1_bound, tma_4k_aliasing + tma_dtlb_load + tma_fb_full + tma_lock_latency + tma_split_loads + tma_store_fwd_blk)) + tma_store_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) * (tma_dtlb_store / (tma_dtlb_store + tma_false_sharing + tma_split_stores + tma_store_latency + tma_streaming_stores)))",
"MetricGroup": "Mem;MemoryTLB;Offcore;tma_issueTLB",
"MetricName": "tma_info_memory_data_tlbs",
@@ -945,6 +951,7 @@
},
{
"BriefDescription": "Total pipeline cost of Memory Latency related bottlenecks (external memory and off-core caches)",
+ "MetricConstraint": "NO_GROUP_EVENTS",
"MetricExpr": "100 * tma_memory_bound * (tma_dram_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) * (tma_mem_latency / (tma_mem_bandwidth + tma_mem_latency)) + tma_l3_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound) * (tma_l3_hit_latency / (tma_contested_accesses + tma_data_sharing + tma_l3_hit_latency + tma_sq_full)) + tma_l2_bound / (tma_dram_bound + tma_l1_bound + tma_l2_bound + tma_l3_bound + tma_store_bound))",
"MetricGroup": "Mem;MemoryLat;Offcore;tma_issueLat",
"MetricName": "tma_info_memory_latency",
@@ -953,6 +960,7 @@
},
{
"BriefDescription": "Total pipeline cost of Branch Misprediction related bottlenecks",
+ "MetricConstraint": "NO_GROUP_EVENTS",
"MetricExpr": "100 * (tma_branch_mispredicts + tma_fetch_latency * tma_mispredicts_resteers / (tma_branch_resteers + tma_dsb_switches + tma_icache_misses + tma_itlb_misses + tma_lcp + tma_ms_switches))",
"MetricGroup": "Bad;BadSpec;BrMispredicts;tma_issueBM",
"MetricName": "tma_info_mispredictions",
@@ -1004,6 +1012,7 @@
},
{
"BriefDescription": "Average number of Uops retired in cycles where at least one uop has retired.",
+ "MetricConstraint": "NO_GROUP_EVENTS",
"MetricExpr": "tma_retiring * tma_info_slots / cpu@UOPS_RETIRED.SLOTS\\,cmask\\=1@",
"MetricGroup": "Pipeline;Ret",
"MetricName": "tma_info_retire"
@@ -1207,6 +1216,7 @@
},
{
"BriefDescription": "This metric represents fraction of slots where the CPU was retiring memory operations -- uops for memory load or store accesses.",
+ "MetricConstraint": "NO_GROUP_EVENTS",
"MetricExpr": "tma_light_operations * MEM_INST_RETIRED.ANY / INST_RETIRED.ANY",
"MetricGroup": "Pipeline;TopdownL3;tma_L3_group;tma_light_operations_group",
"MetricName": "tma_memory_operations",
@@ -1277,6 +1287,7 @@
},
{
"BriefDescription": "This metric represents the remaining light uops fraction the CPU has executed - remaining means not covered by other sibling nodes",
+ "MetricConstraint": "NO_GROUP_EVENTS",
"MetricExpr": "max(0, tma_light_operations - (tma_fp_arith + tma_memory_operations + tma_branch_instructions + tma_nop_instructions))",
"MetricGroup": "Pipeline;TopdownL3;tma_L3_group;tma_light_operations_group",
"MetricName": "tma_other_light_ops",
--
2.40.1.495.gc816e09b53d-goog
next prev parent reply other threads:[~2023-04-28 7:39 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-28 7:37 [PATCH v2 00/43] Fix perf on Intel hybrid CPUs Ian Rogers
2023-04-28 7:37 ` [PATCH v2 01/43] perf stat: Disable TopdownL1 on hybrid Ian Rogers
2023-04-28 13:31 ` Liang, Kan
2023-04-29 1:17 ` Arnaldo Carvalho de Melo
2023-04-28 7:37 ` [PATCH v2 02/43] perf stat: Introduce skippable evsels Ian Rogers
2023-04-28 13:30 ` Liang, Kan
2023-04-28 7:37 ` [PATCH v2 04/43] perf vendor events intel: Add alderlake metric constraints Ian Rogers
2023-04-28 7:37 ` Ian Rogers [this message]
2023-04-28 7:37 ` [PATCH v2 06/43] perf vendor events intel: Add icelakex " Ian Rogers
2023-04-28 7:37 ` [PATCH v2 07/43] perf vendor events intel: Add sapphirerapids " Ian Rogers
2023-04-28 7:37 ` [PATCH v2 08/43] perf vendor events intel: Add tigerlake " Ian Rogers
2023-04-28 7:37 ` [PATCH v2 09/43] perf stat: Avoid segv on counter->name Ian Rogers
2023-04-29 1:20 ` Arnaldo Carvalho de Melo
2023-04-28 7:37 ` [PATCH v2 10/43] perf test: Test more sysfs events Ian Rogers
2023-04-28 7:37 ` [PATCH v2 11/43] perf test: Use valid for PMU tests Ian Rogers
2023-04-28 7:37 ` [PATCH v2 12/43] perf test: Mask config then test Ian Rogers
2023-04-28 7:37 ` [PATCH v2 13/43] perf test: Test more with config_cache Ian Rogers
2023-04-28 7:37 ` [PATCH v2 14/43] perf test: Roundtrip name, don't assume 1 event per name Ian Rogers
2023-04-28 7:37 ` [PATCH v2 15/43] perf parse-events: Set attr.type to PMU type early Ian Rogers
2023-04-28 7:37 ` [PATCH v2 16/43] perf parse-events: Set pmu_name whenever a pmu is given Ian Rogers
2023-04-28 7:37 ` [PATCH v2 17/43] perf print-events: Avoid unnecessary strlist Ian Rogers
2023-04-28 7:37 ` [PATCH v2 18/43] perf parse-events: Avoid scanning PMUs before parsing Ian Rogers
2023-04-28 7:37 ` [PATCH v2 19/43] perf evsel: Modify group pmu name for software events Ian Rogers
2023-04-28 7:37 ` [PATCH v2 20/43] perf test: Move x86 hybrid tests to arch/x86 Ian Rogers
2023-04-28 13:35 ` Liang, Kan
2023-04-28 13:46 ` Liang, Kan
2023-04-28 7:37 ` [PATCH v2 21/43] perf test x86 hybrid: Update test expectations Ian Rogers
2023-04-28 13:57 ` Liang, Kan
2023-04-28 7:37 ` [PATCH v2 22/43] perf parse-events: Support PMUs for legacy cache events Ian Rogers
2023-04-28 7:37 ` [PATCH v2 23/43] perf parse-events: Wildcard " Ian Rogers
2023-04-28 7:37 ` [PATCH v2 24/43] perf print-events: Print legacy cache events for each PMU Ian Rogers
2023-04-28 7:37 ` [PATCH v2 25/43] perf parse-events: Support wildcards on raw events Ian Rogers
2023-04-28 7:37 ` [PATCH v2 26/43] perf parse-events: Remove now unused hybrid logic Ian Rogers
2023-04-28 7:37 ` [PATCH v2 27/43] perf parse-events: Minor type safety cleanup Ian Rogers
2023-04-28 7:37 ` [PATCH v2 28/43] perf parse-events: Add pmu filter Ian Rogers
2023-04-28 7:37 ` [PATCH v2 29/43] perf stat: Make cputype filter generic Ian Rogers
2023-04-28 7:37 ` [PATCH v2 30/43] perf test: Add cputype testing to perf stat Ian Rogers
2023-04-28 7:37 ` [PATCH v2 31/43] perf test: Fix parse-events tests for >1 core PMU Ian Rogers
2023-04-28 7:37 ` [PATCH v2 32/43] perf parse-events: Support hardware events as terms Ian Rogers
2023-04-28 7:37 ` [PATCH v2 33/43] perf parse-events: Avoid error when assigning a term Ian Rogers
2023-04-28 7:38 ` [PATCH v2 34/43] perf parse-events: Avoid error when assigning a legacy cache term Ian Rogers
2023-04-28 7:38 ` [PATCH v2 35/43] perf parse-events: Don't auto merge hybrid wildcard events Ian Rogers
2023-04-28 7:38 ` [PATCH v2 36/43] perf parse-events: Don't reorder atom cpu events Ian Rogers
2023-04-28 7:38 ` [PATCH v2 37/43] perf metrics: Be PMU specific for referenced metrics Ian Rogers
2023-04-28 7:38 ` [PATCH v2 38/43] perf stat: Command line PMU metric filtering Ian Rogers
2023-04-28 7:38 ` [PATCH v2 39/43] perf vendor events intel: Correct alderlake metrics Ian Rogers
2023-04-28 7:38 ` [PATCH v2 40/43] perf jevents: Don't rewrite metrics across PMUs Ian Rogers
2023-04-28 7:38 ` [PATCH v2 41/43] perf metrics: Be PMU specific in event match Ian Rogers
2023-04-28 7:38 ` [PATCH v2 42/43] perf stat: Don't disable TopdownL1 metric on hybrid Ian Rogers
2023-04-28 7:38 ` [PATCH v2 43/43] perf parse-events: Reduce scope of is_event_supported Ian Rogers
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