From: Ian Rogers <irogers@google.com>
To: Arnaldo Carvalho de Melo <acme@kernel.org>,
Kan Liang <kan.liang@linux.intel.com>,
Ahmad Yasin <ahmad.yasin@intel.com>,
Peter Zijlstra <peterz@infradead.org>,
Ingo Molnar <mingo@redhat.com>,
Stephane Eranian <eranian@google.com>,
Andi Kleen <ak@linux.intel.com>,
Perry Taylor <perry.taylor@intel.com>,
Samantha Alt <samantha.alt@intel.com>,
Caleb Biggers <caleb.biggers@intel.com>,
Weilin Wang <weilin.wang@intel.com>,
Edward Baker <edward.baker@intel.com>,
Mark Rutland <mark.rutland@arm.com>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Jiri Olsa <jolsa@kernel.org>, Namhyung Kim <namhyung@kernel.org>,
Adrian Hunter <adrian.hunter@intel.com>,
Florian Fischer <florian.fischer@muhq.space>,
Rob Herring <robh@kernel.org>,
Zhengjun Xing <zhengjun.xing@linux.intel.com>,
John Garry <john.g.garry@oracle.com>,
Kajol Jain <kjain@linux.ibm.com>,
Sumanth Korikkar <sumanthk@linux.ibm.com>,
Thomas Richter <tmricht@linux.ibm.com>,
Tiezhu Yang <yangtiezhu@loongson.cn>,
Ravi Bangoria <ravi.bangoria@amd.com>,
Leo Yan <leo.yan@linaro.org>,
Yang Jihong <yangjihong1@huawei.com>,
James Clark <james.clark@arm.com>,
Suzuki Poulouse <suzuki.poulose@arm.com>,
Kang Minchul <tegongkang@gmail.com>,
Athira Rajeev <atrajeev@linux.vnet.ibm.com>,
linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org
Cc: Ian Rogers <irogers@google.com>
Subject: [PATCH v4 25/44] perf print-events: Print legacy cache events for each PMU
Date: Tue, 2 May 2023 15:38:32 -0700 [thread overview]
Message-ID: <20230502223851.2234828-26-irogers@google.com> (raw)
In-Reply-To: <20230502223851.2234828-1-irogers@google.com>
Mirroring parse_events_add_cache, list the legacy name alongside its
alias with the PMU. Remove the now unnecessary hybrid logic.
Note, the alias output removes the event type descriptor, so:
L1-dcache-loads [Hardware cache event]
becomes:
L1-dcache-loads OR cpu/L1-dcache-loads/
Signed-off-by: Ian Rogers <irogers@google.com>
---
tools/perf/util/parse-events.c | 2 +-
tools/perf/util/parse-events.h | 1 +
tools/perf/util/print-events.c | 88 ++++++++++++++++------------------
3 files changed, 43 insertions(+), 48 deletions(-)
diff --git a/tools/perf/util/parse-events.c b/tools/perf/util/parse-events.c
index 9f2bbf8f3a81..ec72f11fb37f 100644
--- a/tools/perf/util/parse-events.c
+++ b/tools/perf/util/parse-events.c
@@ -414,7 +414,7 @@ static int config_attr(struct perf_event_attr *attr,
* contain hyphens and the longest name
* should always be selected.
*/
-static int parse_events__decode_legacy_cache(const char *name, int pmu_type, __u64 *config)
+int parse_events__decode_legacy_cache(const char *name, int pmu_type, __u64 *config)
{
int len, cache_type = -1, cache_op = -1, cache_result = -1;
const char *name_end = &name[strlen(name) + 1];
diff --git a/tools/perf/util/parse-events.h b/tools/perf/util/parse-events.h
index 0c26303f7f63..4e49be290209 100644
--- a/tools/perf/util/parse-events.h
+++ b/tools/perf/util/parse-events.h
@@ -173,6 +173,7 @@ int parse_events_add_tool(struct parse_events_state *parse_state,
int parse_events_add_cache(struct list_head *list, int *idx, const char *name,
struct parse_events_error *error,
struct list_head *head_config);
+int parse_events__decode_legacy_cache(const char *name, int pmu_type, __u64 *config);
int parse_events_add_breakpoint(struct list_head *list, int *idx,
u64 addr, char *type, u64 len);
int parse_events_add_pmu(struct parse_events_state *parse_state,
diff --git a/tools/perf/util/print-events.c b/tools/perf/util/print-events.c
index 89ac34a922c9..d148842b205a 100644
--- a/tools/perf/util/print-events.c
+++ b/tools/perf/util/print-events.c
@@ -230,56 +230,50 @@ void print_sdt_events(const struct print_callbacks *print_cb, void *print_state)
int print_hwcache_events(const struct print_callbacks *print_cb, void *print_state)
{
+ struct perf_pmu *pmu = NULL;
const char *event_type_descriptor = event_type_descriptors[PERF_TYPE_HW_CACHE];
- for (int type = 0; type < PERF_COUNT_HW_CACHE_MAX; type++) {
- for (int op = 0; op < PERF_COUNT_HW_CACHE_OP_MAX; op++) {
- /* skip invalid cache type */
- if (!evsel__is_cache_op_valid(type, op))
- continue;
-
- for (int res = 0; res < PERF_COUNT_HW_CACHE_RESULT_MAX; res++) {
- struct perf_pmu *pmu = NULL;
- char name[64];
-
- __evsel__hw_cache_type_op_res_name(type, op, res,
- name, sizeof(name));
- if (!perf_pmu__has_hybrid()) {
- if (is_event_supported(PERF_TYPE_HW_CACHE,
- type | (op << 8) | (res << 16))) {
- print_cb->print_event(print_state,
- "cache",
- /*pmu_name=*/NULL,
- name,
- /*event_alias=*/NULL,
- /*scale_unit=*/NULL,
- /*deprecated=*/false,
- event_type_descriptor,
- /*desc=*/NULL,
- /*long_desc=*/NULL,
- /*encoding_desc=*/NULL);
- }
+ while ((pmu = perf_pmu__scan(pmu)) != NULL) {
+ /*
+ * Skip uncore PMUs for performance. PERF_TYPE_HW_CACHE type
+ * attributes can accept software PMUs in the extended type, so
+ * also skip.
+ */
+ if (pmu->is_uncore || pmu->type == PERF_TYPE_SOFTWARE)
+ continue;
+
+ for (int type = 0; type < PERF_COUNT_HW_CACHE_MAX; type++) {
+ for (int op = 0; op < PERF_COUNT_HW_CACHE_OP_MAX; op++) {
+ /* skip invalid cache type */
+ if (!evsel__is_cache_op_valid(type, op))
continue;
- }
- perf_pmu__for_each_hybrid_pmu(pmu) {
- if (is_event_supported(PERF_TYPE_HW_CACHE,
- type | (op << 8) | (res << 16) |
- ((__u64)pmu->type << PERF_PMU_TYPE_SHIFT))) {
- char new_name[128];
- snprintf(new_name, sizeof(new_name),
- "%s/%s/", pmu->name, name);
- print_cb->print_event(print_state,
- "cache",
- pmu->name,
- name,
- new_name,
- /*scale_unit=*/NULL,
- /*deprecated=*/false,
- event_type_descriptor,
- /*desc=*/NULL,
- /*long_desc=*/NULL,
- /*encoding_desc=*/NULL);
- }
+
+ for (int res = 0; res < PERF_COUNT_HW_CACHE_RESULT_MAX; res++) {
+ char name[64];
+ char alias_name[128];
+ __u64 config;
+ int ret;
+
+ __evsel__hw_cache_type_op_res_name(type, op, res,
+ name, sizeof(name));
+
+ ret = parse_events__decode_legacy_cache(name, pmu->type,
+ &config);
+ if (ret || !is_event_supported(PERF_TYPE_HW_CACHE, config))
+ continue;
+ snprintf(alias_name, sizeof(alias_name), "%s/%s/",
+ pmu->name, name);
+ print_cb->print_event(print_state,
+ "cache",
+ pmu->name,
+ name,
+ alias_name,
+ /*scale_unit=*/NULL,
+ /*deprecated=*/false,
+ event_type_descriptor,
+ /*desc=*/NULL,
+ /*long_desc=*/NULL,
+ /*encoding_desc=*/NULL);
}
}
}
--
2.40.1.495.gc816e09b53d-goog
next prev parent reply other threads:[~2023-05-02 22:43 UTC|newest]
Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-02 22:38 [PATCH v4 00/44] Fix perf on Intel hybrid CPUs Ian Rogers
2023-05-02 22:38 ` [PATCH v4 01/44] perf metric: Change divide by zero and !support events behavior Ian Rogers
2023-05-03 20:57 ` Liang, Kan
2023-05-02 22:38 ` [PATCH v4 02/44] perf stat: Introduce skippable evsels Ian Rogers
2023-05-03 20:57 ` Liang, Kan
2023-05-02 22:38 ` [PATCH v4 04/44] perf parse-events: Don't reorder ungrouped events by pmu Ian Rogers
2023-05-03 20:58 ` Liang, Kan
2023-05-02 22:38 ` [PATCH v4 05/44] perf vendor events intel: Add alderlake metric constraints Ian Rogers
2023-05-02 22:38 ` [PATCH v4 06/44] perf vendor events intel: Add icelake " Ian Rogers
2023-05-02 22:38 ` [PATCH v4 07/44] perf vendor events intel: Add icelakex " Ian Rogers
2023-05-02 22:38 ` [PATCH v4 08/44] perf vendor events intel: Add sapphirerapids " Ian Rogers
2023-05-02 22:38 ` [PATCH v4 09/44] perf vendor events intel: Add tigerlake " Ian Rogers
2023-05-02 22:38 ` [PATCH v4 10/44] perf test: Test more sysfs events Ian Rogers
2023-05-02 22:38 ` [PATCH v4 11/44] perf test: Use valid for PMU tests Ian Rogers
2023-05-02 22:38 ` [PATCH v4 12/44] perf test: Mask configs with extended types then test Ian Rogers
2023-05-02 22:38 ` [PATCH v4 13/44] perf test: Test more with config_cache Ian Rogers
2023-05-02 22:38 ` [PATCH v4 14/44] perf test: Roundtrip name, don't assume 1 event per name Ian Rogers
2023-05-02 22:38 ` [PATCH v4 15/44] perf parse-events: Set attr.type to PMU type early Ian Rogers
2023-05-02 22:38 ` [PATCH v4 16/44] perf parse-events: Set pmu_name whenever a pmu is given Ian Rogers
2023-05-02 22:38 ` [PATCH v4 17/44] perf print-events: Avoid unnecessary strlist Ian Rogers
2023-05-02 22:38 ` [PATCH v4 18/44] perf parse-events: Avoid scanning PMUs before parsing Ian Rogers
2023-05-02 22:38 ` [PATCH v4 19/44] perf evsel: Modify group pmu name for software events Ian Rogers
2023-05-02 22:38 ` [PATCH v4 20/44] perf test: Move x86 hybrid tests to arch/x86 Ian Rogers
2023-05-02 22:38 ` [PATCH v4 21/44] perf test x86 hybrid: Update test expectations Ian Rogers
2023-05-02 22:38 ` [PATCH v4 22/44] perf test x86 hybrid: Add hybrid extended type checks Ian Rogers
2023-05-02 22:38 ` [PATCH v4 23/44] perf parse-events: Support PMUs for legacy cache events Ian Rogers
2023-05-02 22:38 ` [PATCH v4 24/44] perf parse-events: Wildcard " Ian Rogers
2023-05-02 22:38 ` Ian Rogers [this message]
2023-05-02 22:38 ` [PATCH v4 26/44] perf parse-events: Support wildcards on raw events Ian Rogers
2023-05-02 22:38 ` [PATCH v4 27/44] perf parse-events: Remove now unused hybrid logic Ian Rogers
2023-05-02 22:38 ` [PATCH v4 28/44] perf parse-events: Minor type safety cleanup Ian Rogers
2023-05-02 22:38 ` [PATCH v4 29/44] perf parse-events: Add pmu filter Ian Rogers
2023-05-02 22:38 ` [PATCH v4 30/44] perf stat: Make cputype filter generic Ian Rogers
2023-05-02 22:38 ` [PATCH v4 31/44] perf test: Add cputype testing to perf stat Ian Rogers
2023-05-02 22:38 ` [PATCH v4 32/44] perf test: Fix parse-events tests for >1 core PMU Ian Rogers
2023-05-02 22:38 ` [PATCH v4 33/44] perf parse-events: Support hardware events as terms Ian Rogers
2023-05-02 22:38 ` [PATCH v4 34/44] perf parse-events: Avoid error when assigning a term Ian Rogers
2023-05-02 22:38 ` [PATCH v4 35/44] perf parse-events: Avoid error when assigning a legacy cache term Ian Rogers
2023-05-02 22:38 ` [PATCH v4 36/44] perf parse-events: Don't auto merge hybrid wildcard events Ian Rogers
2023-05-02 22:38 ` [PATCH v4 37/44] perf parse-events: Don't reorder atom cpu events Ian Rogers
2023-05-02 22:38 ` [PATCH v4 38/44] perf metrics: Be PMU specific for referenced metrics Ian Rogers
2023-05-02 22:38 ` [PATCH v4 39/44] perf stat: Command line PMU metric filtering Ian Rogers
2023-05-02 22:38 ` [PATCH v4 40/44] perf vendor events intel: Correct alderlake metrics Ian Rogers
2023-05-02 22:38 ` [PATCH v4 41/44] perf jevents: Don't rewrite metrics across PMUs Ian Rogers
2023-05-02 22:38 ` [PATCH v4 42/44] perf metrics: Be PMU specific in event match Ian Rogers
2023-05-02 22:38 ` [PATCH v4 43/44] perf stat: Don't disable TopdownL1 metric on hybrid Ian Rogers
2023-05-02 22:38 ` [PATCH v4 44/44] perf parse-events: Reduce scope of is_event_supported Ian Rogers
2023-05-03 20:56 ` [PATCH v4 00/44] Fix perf on Intel hybrid CPUs Liang, Kan
2023-05-12 18:33 ` Arnaldo Carvalho de Melo
2023-05-14 12:03 ` Liang, Kan
2023-05-15 12:14 ` Arnaldo Carvalho de Melo
2023-05-15 22:49 ` Ian Rogers
2023-05-16 18:19 ` Arnaldo Carvalho de Melo
2023-05-09 18:09 ` Arnaldo Carvalho de Melo
2023-05-12 18:28 ` Arnaldo Carvalho de Melo
2023-05-13 6:39 ` Ian Rogers
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230502223851.2234828-26-irogers@google.com \
--to=irogers@google.com \
--cc=acme@kernel.org \
--cc=adrian.hunter@intel.com \
--cc=ahmad.yasin@intel.com \
--cc=ak@linux.intel.com \
--cc=alexander.shishkin@linux.intel.com \
--cc=atrajeev@linux.vnet.ibm.com \
--cc=caleb.biggers@intel.com \
--cc=edward.baker@intel.com \
--cc=eranian@google.com \
--cc=florian.fischer@muhq.space \
--cc=james.clark@arm.com \
--cc=john.g.garry@oracle.com \
--cc=jolsa@kernel.org \
--cc=kan.liang@linux.intel.com \
--cc=kjain@linux.ibm.com \
--cc=leo.yan@linaro.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-perf-users@vger.kernel.org \
--cc=mark.rutland@arm.com \
--cc=mingo@redhat.com \
--cc=namhyung@kernel.org \
--cc=perry.taylor@intel.com \
--cc=peterz@infradead.org \
--cc=ravi.bangoria@amd.com \
--cc=robh@kernel.org \
--cc=samantha.alt@intel.com \
--cc=sumanthk@linux.ibm.com \
--cc=suzuki.poulose@arm.com \
--cc=tegongkang@gmail.com \
--cc=tmricht@linux.ibm.com \
--cc=weilin.wang@intel.com \
--cc=yangjihong1@huawei.com \
--cc=yangtiezhu@loongson.cn \
--cc=zhengjun.xing@linux.intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).