From: Ian Rogers <irogers@google.com>
To: Suzuki K Poulose <suzuki.poulose@arm.com>,
Mike Leach <mike.leach@linaro.org>, Leo Yan <leo.yan@linaro.org>,
John Garry <john.g.garry@oracle.com>,
Will Deacon <will@kernel.org>, James Clark <james.clark@arm.com>,
Peter Zijlstra <peterz@infradead.org>,
Ingo Molnar <mingo@redhat.com>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Jiri Olsa <jolsa@kernel.org>, Namhyung Kim <namhyung@kernel.org>,
Ian Rogers <irogers@google.com>,
Adrian Hunter <adrian.hunter@intel.com>,
Kajol Jain <kjain@linux.ibm.com>,
Jing Zhang <renyu.zj@linux.alibaba.com>,
Kan Liang <kan.liang@linux.intel.com>,
Zhengjun Xing <zhengjun.xing@linux.intel.com>,
Ravi Bangoria <ravi.bangoria@amd.com>,
Madhavan Srinivasan <maddy@linux.ibm.com>,
Athira Rajeev <atrajeev@linux.vnet.ibm.com>,
Ming Wang <wangming01@loongson.cn>,
Huacai Chen <chenhuacai@kernel.org>,
Sandipan Das <sandipan.das@amd.com>,
Dmitrii Dolgov <9erthalion6@gmail.com>,
Sean Christopherson <seanjc@google.com>,
Raul Silvera <rsilvera@google.com>,
Ali Saidi <alisaidi@amazon.com>, Rob Herring <robh@kernel.org>,
Thomas Richter <tmricht@linux.ibm.com>,
Kang Minchul <tegongkang@gmail.com>,
linux-kernel@vger.kernel.org, coresight@lists.linaro.org,
linux-arm-kernel@lists.infradead.org,
linux-perf-users@vger.kernel.org
Subject: [PATCH v1 09/23] perf x86: Iterate hybrid PMUs as core PMUs
Date: Wed, 17 May 2023 07:57:49 -0700 [thread overview]
Message-ID: <20230517145803.559429-10-irogers@google.com> (raw)
In-Reply-To: <20230517145803.559429-1-irogers@google.com>
Rather than iterating over a separate hybrid list, iterate all PMUs
with the hybrid ones having is_core as true.
Signed-off-by: Ian Rogers <irogers@google.com>
---
tools/perf/arch/x86/tests/hybrid.c | 2 +-
tools/perf/arch/x86/util/evlist.c | 25 +++++++++++++++++--------
tools/perf/arch/x86/util/perf_regs.c | 14 ++++++++++----
3 files changed, 28 insertions(+), 13 deletions(-)
diff --git a/tools/perf/arch/x86/tests/hybrid.c b/tools/perf/arch/x86/tests/hybrid.c
index 941a9edfed4e..944bd1b4bab6 100644
--- a/tools/perf/arch/x86/tests/hybrid.c
+++ b/tools/perf/arch/x86/tests/hybrid.c
@@ -3,7 +3,7 @@
#include "debug.h"
#include "evlist.h"
#include "evsel.h"
-#include "pmu-hybrid.h"
+#include "pmu.h"
#include "tests/tests.h"
static bool test_config(const struct evsel *evsel, __u64 expected_config)
diff --git a/tools/perf/arch/x86/util/evlist.c b/tools/perf/arch/x86/util/evlist.c
index 1b6065841fb0..03f7eb4cf0a4 100644
--- a/tools/perf/arch/x86/util/evlist.c
+++ b/tools/perf/arch/x86/util/evlist.c
@@ -4,7 +4,6 @@
#include "util/evlist.h"
#include "util/parse-events.h"
#include "util/event.h"
-#include "util/pmu-hybrid.h"
#include "topdown.h"
#include "evsel.h"
@@ -12,9 +11,6 @@ static int ___evlist__add_default_attrs(struct evlist *evlist,
struct perf_event_attr *attrs,
size_t nr_attrs)
{
- struct perf_cpu_map *cpus;
- struct evsel *evsel, *n;
- struct perf_pmu *pmu;
LIST_HEAD(head);
size_t i = 0;
@@ -25,15 +21,24 @@ static int ___evlist__add_default_attrs(struct evlist *evlist,
return evlist__add_attrs(evlist, attrs, nr_attrs);
for (i = 0; i < nr_attrs; i++) {
+ struct perf_pmu *pmu = NULL;
+
if (attrs[i].type == PERF_TYPE_SOFTWARE) {
- evsel = evsel__new(attrs + i);
+ struct evsel *evsel = evsel__new(attrs + i);
+
if (evsel == NULL)
goto out_delete_partial_list;
list_add_tail(&evsel->core.node, &head);
continue;
}
- perf_pmu__for_each_hybrid_pmu(pmu) {
+ while ((pmu = perf_pmu__scan(pmu)) != NULL) {
+ struct perf_cpu_map *cpus;
+ struct evsel *evsel;
+
+ if (!pmu->is_core)
+ continue;
+
evsel = evsel__new(attrs + i);
if (evsel == NULL)
goto out_delete_partial_list;
@@ -51,8 +56,12 @@ static int ___evlist__add_default_attrs(struct evlist *evlist,
return 0;
out_delete_partial_list:
- __evlist__for_each_entry_safe(&head, n, evsel)
- evsel__delete(evsel);
+ {
+ struct evsel *evsel, *n;
+
+ __evlist__for_each_entry_safe(&head, n, evsel)
+ evsel__delete(evsel);
+ }
return -1;
}
diff --git a/tools/perf/arch/x86/util/perf_regs.c b/tools/perf/arch/x86/util/perf_regs.c
index 0ed177991ad0..26abc159fc0e 100644
--- a/tools/perf/arch/x86/util/perf_regs.c
+++ b/tools/perf/arch/x86/util/perf_regs.c
@@ -10,7 +10,6 @@
#include "../../../util/debug.h"
#include "../../../util/event.h"
#include "../../../util/pmu.h"
-#include "../../../util/pmu-hybrid.h"
const struct sample_reg sample_reg_masks[] = {
SMPL_REG(AX, PERF_REG_X86_AX),
@@ -286,7 +285,6 @@ uint64_t arch__intr_reg_mask(void)
.disabled = 1,
.exclude_kernel = 1,
};
- struct perf_pmu *pmu;
int fd;
/*
* In an unnamed union, init it here to build on older gcc versions
@@ -294,12 +292,20 @@ uint64_t arch__intr_reg_mask(void)
attr.sample_period = 1;
if (perf_pmu__has_hybrid()) {
+ struct perf_pmu *pmu = NULL;
+ __u64 type = PERF_TYPE_RAW;
+
/*
* The same register set is supported among different hybrid PMUs.
* Only check the first available one.
*/
- pmu = list_first_entry(&perf_pmu__hybrid_pmus, typeof(*pmu), hybrid_list);
- attr.config |= (__u64)pmu->type << PERF_PMU_TYPE_SHIFT;
+ while ((pmu = perf_pmu__scan(pmu)) != NULL) {
+ if (pmu->is_core) {
+ type = pmu->type;
+ break;
+ }
+ }
+ attr.config |= type << PERF_PMU_TYPE_SHIFT;
}
event_attr_init(&attr);
--
2.40.1.606.ga4b1b128d6-goog
next prev parent reply other threads:[~2023-05-17 14:59 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-17 14:57 [PATCH v1 00/23] PMU refactoring and improvements Ian Rogers
2023-05-17 14:57 ` [PATCH v1 01/23] perf tools: Warn if no user requested CPUs match PMU's CPUs Ian Rogers
2023-05-21 19:04 ` Liang, Kan
2023-05-22 4:52 ` Ian Rogers
2023-05-22 11:33 ` Liang, Kan
2023-05-17 14:57 ` [PATCH v1 02/23] perf evlist: Remove evlist__warn_hybrid_group Ian Rogers
2023-05-17 14:57 ` [PATCH v1 03/23] perf evlist: Remove __evlist__add_default Ian Rogers
2023-05-21 19:12 ` Liang, Kan
2023-05-22 5:12 ` Ian Rogers
2023-05-17 14:57 ` [PATCH v1 04/23] perf evlist: Reduce scope of evlist__has_hybrid Ian Rogers
2023-05-17 14:57 ` [PATCH v1 05/23] perf pmu: Remove perf_pmu__hybrid_mounted Ian Rogers
2023-05-21 19:23 ` Liang, Kan
2023-05-22 5:21 ` Ian Rogers
2023-05-22 11:55 ` Liang, Kan
2023-05-22 14:06 ` Ian Rogers
2023-05-23 17:23 ` Liang, Kan
2023-05-23 17:45 ` Ian Rogers
2023-05-17 14:57 ` [PATCH v1 06/23] perf pmu: Detect ARM and hybrid PMUs with sysfs Ian Rogers
2023-05-17 14:57 ` [PATCH v1 07/23] perf pmu: Add is_core to pmu Ian Rogers
2023-05-17 14:57 ` [PATCH v1 08/23] perf pmu: Rewrite perf_pmu__has_hybrid to avoid list Ian Rogers
2023-05-17 14:57 ` Ian Rogers [this message]
2023-05-17 14:57 ` [PATCH v1 10/23] perf topology: Avoid hybrid list for hybrid topology Ian Rogers
2023-05-17 14:57 ` [PATCH v1 11/23] perf evsel: Compute is_hybrid from PMU being core Ian Rogers
2023-05-17 14:57 ` [PATCH v1 12/23] perf header: Avoid hybrid PMU list in write_pmu_caps Ian Rogers
2023-05-17 14:57 ` [PATCH v1 13/23] perf metrics: Remove perf_pmu__is_hybrid use Ian Rogers
2023-05-17 14:57 ` [PATCH v1 14/23] perf stat: Avoid hybrid PMU list Ian Rogers
2023-05-17 14:57 ` [PATCH v1 15/23] perf mem: " Ian Rogers
2023-05-17 14:57 ` [PATCH v1 16/23] perf pmu: Remove perf_pmu__hybrid_pmus list Ian Rogers
2023-05-17 14:57 ` [PATCH v1 17/23] perf pmus: Prefer perf_pmu__scan over perf_pmus__for_each_pmu Ian Rogers
2023-05-21 19:43 ` Liang, Kan
2023-05-17 14:57 ` [PATCH v1 18/23] perf x86 mem: minor refactor to is_mem_loads_aux_event Ian Rogers
2023-05-21 19:47 ` Liang, Kan
2023-05-17 14:57 ` [PATCH v1 19/23] perf pmu: Separate pmu and pmus Ian Rogers
2023-05-17 14:58 ` [PATCH v1 20/23] perf pmus: Split pmus list into core and uncore Ian Rogers
2023-05-21 20:02 ` Liang, Kan
2023-05-22 5:30 ` Ian Rogers
2023-05-17 14:58 ` [PATCH v1 21/23] perf pmus: Allow just core PMU scanning Ian Rogers
2023-05-17 14:58 ` [PATCH v1 22/23] perf pmus: Avoid repeated sysfs scanning Ian Rogers
2023-05-17 14:58 ` [PATCH v1 23/23] perf pmus: Ensure all PMUs are read for find_by_type Ian Rogers
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