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From: Leo Yan <leo.yan@linaro.org>
To: Arnaldo Carvalho de Melo <acme@kernel.org>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>,
	John Garry <john.g.garry@oracle.com>,
	James Clark <james.clark@arm.com>,
	Mike Leach <mike.leach@linaro.org>,
	Peter Zijlstra <peterz@infradead.org>,
	Ingo Molnar <mingo@redhat.com>,
	Mark Rutland <mark.rutland@arm.com>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Jiri Olsa <jolsa@kernel.org>, Namhyung Kim <namhyung@kernel.org>,
	Ian Rogers <irogers@google.com>,
	Adrian Hunter <adrian.hunter@intel.com>,
	D Scott Phillips <scott@os.amperecomputing.com>,
	Marc Zyngier <maz@kernel.org>,
	Anshuman Khandual <anshuman.khandual@arm.com>,
	German Gomez <german.gomez@arm.com>,
	Ali Saidi <alisaidi@amazon.com>,
	Jing Zhang <renyu.zj@linux.alibaba.com>,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org,
	fissure2010@gmail.com
Cc: Leo Yan <leo.yan@linaro.org>
Subject: [PATCH v1 2/3] tools headers arm64: Sync Cortex-X4 CPU part definitions
Date: Mon, 17 Jul 2023 13:43:26 +0800	[thread overview]
Message-ID: <20230717054327.79815-3-leo.yan@linaro.org> (raw)
In-Reply-To: <20230717054327.79815-1-leo.yan@linaro.org>

Sync Cortex-X4 CPU part number and MIDR definitions with the kernel
header.

Signed-off-by: Leo Yan <leo.yan@linaro.org>
---
 tools/arch/arm64/include/asm/cputype.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/tools/arch/arm64/include/asm/cputype.h b/tools/arch/arm64/include/asm/cputype.h
index 5f6f84837a49..415be1a000c6 100644
--- a/tools/arch/arm64/include/asm/cputype.h
+++ b/tools/arch/arm64/include/asm/cputype.h
@@ -84,6 +84,7 @@
 #define ARM_CPU_PART_CORTEX_X2		0xD48
 #define ARM_CPU_PART_NEOVERSE_N2	0xD49
 #define ARM_CPU_PART_CORTEX_A78C	0xD4B
+#define ARM_CPU_PART_CORTEX_X4		0xD82
 
 #define APM_CPU_PART_POTENZA		0x000
 
@@ -153,6 +154,7 @@
 #define MIDR_CORTEX_X2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X2)
 #define MIDR_NEOVERSE_N2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_N2)
 #define MIDR_CORTEX_A78C	MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A78C)
+#define MIDR_CORTEX_X4 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X4)
 #define MIDR_THUNDERX	MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX)
 #define MIDR_THUNDERX_81XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_81XX)
 #define MIDR_THUNDERX_83XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_83XX)
-- 
2.34.1


  parent reply	other threads:[~2023-07-17  5:44 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-17  5:43 [PATCH v1 0/3] arm64: Support Cortex-X4 CPU for Perf Arm SPE Leo Yan
2023-07-17  5:43 ` [PATCH v1 1/3] arm64: Add Cortex-X4 CPU part definitions Leo Yan
2023-07-24  6:44   ` Anshuman Khandual
2023-07-24  6:55   ` Anshuman Khandual
2023-07-17  5:43 ` Leo Yan [this message]
2023-07-17  5:43 ` [PATCH v1 3/3] perf arm-spe: Support data source for Cortex-X4 CPU Leo Yan
2023-07-24  6:57   ` Anshuman Khandual
2023-07-24 11:05     ` Leo Yan
2023-07-28 14:22       ` Will Deacon
2023-07-21 18:16 ` [PATCH v1 0/3] arm64: Support Cortex-X4 CPU for Perf Arm SPE Ali Saidi
2023-07-24 11:30   ` Leo Yan
2023-07-28 14:38     ` Arnaldo Carvalho de Melo

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