From: Manali Shukla <manali.shukla@amd.com>
To: <kvm@vger.kernel.org>, <seanjc@google.com>
Cc: <linux-doc@vger.kernel.org>, <linux-perf-users@vger.kernel.org>,
<x86@kernel.org>, <pbonzini@redhat.com>, <peterz@infradead.org>,
<bp@alien8.de>, <santosh.shukla@amd.com>, <ravi.bangoria@amd.com>,
<thomas.lendacky@amd.com>, <nikunj@amd.com>,
<manali.shukla@amd.com>
Subject: [PATCH 11/13] KVM: SVM: Add support for IBS virtualization for SEV-ES guests
Date: Mon, 4 Sep 2023 09:53:45 +0000 [thread overview]
Message-ID: <20230904095347.14994-12-manali.shukla@amd.com> (raw)
In-Reply-To: <20230904095347.14994-1-manali.shukla@amd.com>
Since the IBS state is swap type C, the hypervisor is responsible for
saving its own IBS state before VMRUN and restoring it after VMEXIT.
It is also responsible for disabling IBS before VMRUN and re-enabling
it after VMEXIT. For a SEV-ES guest with IBS virtualization enabled,
a VMEXIT_INVALID will happen if IBS is found to be enabled on VMRUN
[1].
The IBS virtualization feature for SEV-ES guests is not enabled in this
patch. Later patches enable IBS virtualization for SEV-ES guests.
[1]: https://bugzilla.kernel.org/attachment.cgi?id=304653
AMD64 Architecture Programmer’s Manual, Vol 2, Section 15.38
Instruction-Based Sampling Virtualization.
Signed-off-by: Manali Shukla <manali.shukla@amd.com>
---
arch/x86/include/asm/svm.h | 14 +++++++++++++-
arch/x86/kvm/svm/sev.c | 7 +++++++
arch/x86/kvm/svm/svm.c | 11 +++++------
3 files changed, 25 insertions(+), 7 deletions(-)
diff --git a/arch/x86/include/asm/svm.h b/arch/x86/include/asm/svm.h
index 4096d2f68770..58b60842a3b7 100644
--- a/arch/x86/include/asm/svm.h
+++ b/arch/x86/include/asm/svm.h
@@ -469,6 +469,18 @@ struct sev_es_save_area {
u8 fpreg_x87[80];
u8 fpreg_xmm[256];
u8 fpreg_ymm[256];
+ u8 lbr_stack_from_to[256];
+ u64 lbr_select;
+ u64 ibs_fetch_ctl;
+ u64 ibs_fetch_linear_addr;
+ u64 ibs_op_ctl;
+ u64 ibs_op_rip;
+ u64 ibs_op_data;
+ u64 ibs_op_data2;
+ u64 ibs_op_data3;
+ u64 ibs_dc_linear_addr;
+ u64 ibs_br_target;
+ u64 ibs_fetch_extd_ctl;
} __packed;
struct ghcb_save_area {
@@ -527,7 +539,7 @@ struct ghcb {
#define EXPECTED_VMCB_SAVE_AREA_SIZE 1992
#define EXPECTED_GHCB_SAVE_AREA_SIZE 1032
-#define EXPECTED_SEV_ES_SAVE_AREA_SIZE 1648
+#define EXPECTED_SEV_ES_SAVE_AREA_SIZE 1992
#define EXPECTED_VMCB_CONTROL_AREA_SIZE 1024
#define EXPECTED_GHCB_SIZE PAGE_SIZE
diff --git a/arch/x86/kvm/svm/sev.c b/arch/x86/kvm/svm/sev.c
index d3aec1f2cad2..41706335cedd 100644
--- a/arch/x86/kvm/svm/sev.c
+++ b/arch/x86/kvm/svm/sev.c
@@ -59,6 +59,7 @@ module_param_named(sev_es, sev_es_enabled, bool, 0444);
#define sev_es_enabled false
#endif /* CONFIG_KVM_AMD_SEV */
+static bool sev_es_vibs_enabled;
static u8 sev_enc_bit;
static DECLARE_RWSEM(sev_deactivate_lock);
static DEFINE_MUTEX(sev_bitmap_lock);
@@ -2256,6 +2257,9 @@ void __init sev_hardware_setup(void)
sev_enabled = sev_supported;
sev_es_enabled = sev_es_supported;
+
+ if (!sev_es_enabled || !cpu_feature_enabled(X86_FEATURE_SEV_ES_VIBS))
+ sev_es_vibs_enabled = false;
#endif
}
@@ -2993,6 +2997,9 @@ static void sev_es_init_vmcb(struct vcpu_svm *svm)
if (guest_cpuid_has(&svm->vcpu, X86_FEATURE_RDTSCP))
svm_clr_intercept(svm, INTERCEPT_RDTSCP);
}
+
+ if (sev_es_vibs_enabled && svm->ibs_enabled)
+ svm_ibs_msr_interception(svm, false);
}
void sev_init_vmcb(struct vcpu_svm *svm)
diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c
index 6f566ed93f4c..0cfe23bb144a 100644
--- a/arch/x86/kvm/svm/svm.c
+++ b/arch/x86/kvm/svm/svm.c
@@ -4194,16 +4194,15 @@ static noinstr void svm_vcpu_enter_exit(struct kvm_vcpu *vcpu, bool spec_ctrl_in
guest_state_enter_irqoff();
amd_clear_divider();
+ restore_mask = svm_save_swap_type_c(vcpu);
- if (sev_es_guest(vcpu->kvm)) {
+ if (sev_es_guest(vcpu->kvm))
__svm_sev_es_vcpu_run(svm, spec_ctrl_intercepted);
- } else {
- restore_mask = svm_save_swap_type_c(vcpu);
+ else
__svm_vcpu_run(svm, spec_ctrl_intercepted);
- if (restore_mask)
- svm_restore_swap_type_c(vcpu, restore_mask);
- }
+ if (restore_mask)
+ svm_restore_swap_type_c(vcpu, restore_mask);
guest_state_exit_irqoff();
}
--
2.34.1
next prev parent reply other threads:[~2023-09-04 9:57 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-04 9:53 [PATCH 00/13] Implement support for IBS virtualization Manali Shukla
2023-09-04 9:53 ` [PATCH 01/13] KVM: Add KVM_GET_LAPIC_W_EXTAPIC and KVM_SET_LAPIC_W_EXTAPIC for extapic Manali Shukla
2023-09-12 1:47 ` Chao Gao
2023-09-04 9:53 ` [PATCH 02/13] x86/cpufeatures: Add CPUID feature bit for Extended LVT Manali Shukla
2023-09-04 9:53 ` [PATCH 03/13] KVM: x86: Add emulation support for Extented LVT registers Manali Shukla
2023-09-12 2:36 ` Chao Gao
2023-09-04 9:53 ` [PATCH 04/13] x86/cpufeatures: Add CPUID feature bit for virtualized IBS Manali Shukla
2023-09-04 9:53 ` [PATCH 05/13] KVM: x86/cpuid: Add a KVM-only leaf for IBS capabilities Manali Shukla
2023-09-04 9:53 ` [PATCH 06/13] KVM: x86: Extend CPUID range to include new leaf Manali Shukla
2023-09-12 2:46 ` Chao Gao
2023-09-04 9:53 ` [PATCH 07/13] KVM: SVM: Extend VMCB area for virtualized IBS registers Manali Shukla
2023-09-12 2:50 ` Chao Gao
2023-09-04 9:53 ` [PATCH 08/13] perf/x86/amd: Add framework to save/restore host IBS state Manali Shukla
2023-09-05 14:54 ` Tom Lendacky
2023-09-04 9:53 ` [PATCH 09/13] KVM: SVM: add support for IBS virtualization for non SEV-ES guests Manali Shukla
2023-09-05 15:30 ` Tom Lendacky
2023-09-06 1:51 ` Alexey Kardashevskiy
2023-09-12 3:09 ` Chao Gao
2023-09-04 9:53 ` [PATCH 10/13] x86/cpufeatures: Add CPUID feature bit for VIBS in SEV-ES guest Manali Shukla
2023-09-04 9:53 ` Manali Shukla [this message]
2023-09-05 15:43 ` [PATCH 11/13] KVM: SVM: Add support for IBS virtualization for SEV-ES guests Tom Lendacky
2023-09-04 9:53 ` [PATCH 12/13] KVM: SVM: Enable IBS virtualization on non SEV-ES and " Manali Shukla
2023-09-05 16:00 ` Tom Lendacky
2023-09-12 3:30 ` Chao Gao
2023-09-04 9:53 ` [PATCH 13/13] KVM: x86: nSVM: Implement support for nested IBS virtualization Manali Shukla
2023-09-05 15:47 ` [PATCH 00/13] Implement support for " Peter Zijlstra
2023-09-06 15:38 ` Manali Shukla
2023-09-06 19:56 ` Peter Zijlstra
2023-09-07 15:49 ` Manali Shukla
2023-09-08 13:31 ` Peter Zijlstra
2023-09-11 12:32 ` Manali Shukla
2023-09-28 11:18 ` Manali Shukla
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230904095347.14994-12-manali.shukla@amd.com \
--to=manali.shukla@amd.com \
--cc=bp@alien8.de \
--cc=kvm@vger.kernel.org \
--cc=linux-doc@vger.kernel.org \
--cc=linux-perf-users@vger.kernel.org \
--cc=nikunj@amd.com \
--cc=pbonzini@redhat.com \
--cc=peterz@infradead.org \
--cc=ravi.bangoria@amd.com \
--cc=santosh.shukla@amd.com \
--cc=seanjc@google.com \
--cc=thomas.lendacky@amd.com \
--cc=x86@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).