From: Conor Dooley <conor@kernel.org>
To: Yu Chien Peter Lin <peterlin@andestech.com>
Cc: acme@kernel.org, adrian.hunter@intel.com,
ajones@ventanamicro.com, alexander.shishkin@linux.intel.com,
andre.przywara@arm.com, anup@brainfault.org,
aou@eecs.berkeley.edu, atishp@atishpatra.org,
conor+dt@kernel.org, conor.dooley@microchip.com,
devicetree@vger.kernel.org, dminus@andestech.com,
evan@rivosinc.com, geert+renesas@glider.be, guoren@kernel.org,
heiko@sntech.de, irogers@google.com, jernej.skrabec@gmail.com,
jolsa@kernel.org, jszhang@kernel.org,
krzysztof.kozlowski+dt@linaro.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org,
linux-renesas-soc@vger.kernel.org,
linux-riscv@lists.infradead.org, linux-sunxi@lists.linux.dev,
locus84@andestech.com, magnus.damm@gmail.com,
mark.rutland@arm.com, mingo@redhat.com, n.shubin@yadro.com,
namhyung@kernel.org, palmer@dabbelt.com,
paul.walmsley@sifive.com, peterz@infradead.org,
prabhakar.mahadev-lad.rj@bp.renesas.com, rdunlap@infradead.org,
robh+dt@kernel.org, samuel@sholland.org,
sunilvl@ventanamicro.com, tglx@linutronix.de,
tim609@andestech.com, uwu@icenowy.me, wens@csie.org,
will@kernel.org, ycliang@andestech.com
Subject: Re: [PATCH v3 00/13] Support Andes PMU extension
Date: Sun, 22 Oct 2023 19:00:28 +0100 [thread overview]
Message-ID: <20231022-cabana-crate-503b6e8d0481@spud> (raw)
In-Reply-To: <20231022151858.2479969-1-peterlin@andestech.com>
[-- Attachment #1: Type: text/plain, Size: 1945 bytes --]
Hey,
On Sun, Oct 22, 2023 at 11:18:45PM +0800, Yu Chien Peter Lin wrote:
> Hi All,
>
> This patch series introduces the Andes PMU extension, which serves
> the same purpose as Sscofpmf. In this version we use FDT-based
> probing and the CONFIG_ANDES_CUSTOM_PMU to enable perf sampling
> and filtering support.
>
> Its non-standard local interrupt is assigned to bit 18 in the
> custom S-mode local interrupt enable/pending registers (slie/slip),
> while the interrupt cause is (256 + 18).
>
> The feature needs the PMU device registered in OpenSBI.
> The OpenSBI and Linux patches can be found on Andes Technology GitHub
> - https://github.com/andestech/opensbi/commits/andes-pmu-support-v2
> - https://github.com/andestech/linux/commits/andes-pmu-support-v3
>
> The PMU device tree node used on AX45MP:
> - https://github.com/andestech/opensbi/blob/andes-pmu-support-v2/docs/pmu_support.md#example-3
>
> Tested hardware:
> - ASUS Tinker-V (RZ/Five, AX45MP single core)
> - Andes AE350 (AX45MP quad core)
>
> Locus Wei-Han Chen (1):
> riscv: andes: Support symbolic FW and HW raw events
>
> Yu Chien Peter Lin (12):
> riscv: errata: Rename defines for Andes
> irqchip/riscv-intc: Allow large non-standard hwirq number
> irqchip/riscv-intc: Introduce Andes IRQ chip
> dt-bindings: riscv: Add Andes interrupt controller compatible string
> riscv: dts: renesas: r9a07g043f: Update compatible string to use Andes
> INTC
> perf: RISC-V: Eliminate redundant IRQ enable/disable operations
> RISC-V: Move T-Head PMU to CPU feature alternative framework
> perf: RISC-V: Introduce Andes PMU for perf event sampling
> dt-bindings: riscv: Add T-Head PMU extension description
> dt-bindings: riscv: Add Andes PMU extension description
> riscv: dts: allwinner: Add T-Head PMU extension
> riscv: dts: renesas: Add Andes PMU extension
You only sent 5 of these patches FYI.
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
next prev parent reply other threads:[~2023-10-22 18:00 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-22 15:18 [PATCH v3 00/13] Support Andes PMU extension Yu Chien Peter Lin
2023-10-22 15:18 ` [PATCH v3 01/13] riscv: errata: Rename defines for Andes Yu Chien Peter Lin
2023-10-22 15:18 ` [RFC PATCH v3 02/13] irqchip/riscv-intc: Allow large non-standard hwirq number Yu Chien Peter Lin
2023-10-22 15:18 ` [RFC PATCH v3 03/13] irqchip/riscv-intc: Introduce Andes IRQ chip Yu Chien Peter Lin
2023-10-22 15:18 ` [PATCH v3 04/13] dt-bindings: riscv: Add Andes interrupt controller compatible string Yu Chien Peter Lin
2023-10-22 15:18 ` [PATCH v3 05/13] riscv: dts: renesas: r9a07g043f: Update compatible string to use Andes INTC Yu Chien Peter Lin
2023-10-22 18:00 ` Conor Dooley [this message]
2023-10-23 0:13 ` [PATCH v3 00/13] Support Andes PMU extension Yu-Chien Peter Lin
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20231022-cabana-crate-503b6e8d0481@spud \
--to=conor@kernel.org \
--cc=acme@kernel.org \
--cc=adrian.hunter@intel.com \
--cc=ajones@ventanamicro.com \
--cc=alexander.shishkin@linux.intel.com \
--cc=andre.przywara@arm.com \
--cc=anup@brainfault.org \
--cc=aou@eecs.berkeley.edu \
--cc=atishp@atishpatra.org \
--cc=conor+dt@kernel.org \
--cc=conor.dooley@microchip.com \
--cc=devicetree@vger.kernel.org \
--cc=dminus@andestech.com \
--cc=evan@rivosinc.com \
--cc=geert+renesas@glider.be \
--cc=guoren@kernel.org \
--cc=heiko@sntech.de \
--cc=irogers@google.com \
--cc=jernej.skrabec@gmail.com \
--cc=jolsa@kernel.org \
--cc=jszhang@kernel.org \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-perf-users@vger.kernel.org \
--cc=linux-renesas-soc@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=linux-sunxi@lists.linux.dev \
--cc=locus84@andestech.com \
--cc=magnus.damm@gmail.com \
--cc=mark.rutland@arm.com \
--cc=mingo@redhat.com \
--cc=n.shubin@yadro.com \
--cc=namhyung@kernel.org \
--cc=palmer@dabbelt.com \
--cc=paul.walmsley@sifive.com \
--cc=peterlin@andestech.com \
--cc=peterz@infradead.org \
--cc=prabhakar.mahadev-lad.rj@bp.renesas.com \
--cc=rdunlap@infradead.org \
--cc=robh+dt@kernel.org \
--cc=samuel@sholland.org \
--cc=sunilvl@ventanamicro.com \
--cc=tglx@linutronix.de \
--cc=tim609@andestech.com \
--cc=uwu@icenowy.me \
--cc=wens@csie.org \
--cc=will@kernel.org \
--cc=ycliang@andestech.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).