From: Ian Rogers <irogers@google.com>
To: Peter Zijlstra <peterz@infradead.org>,
Ingo Molnar <mingo@redhat.com>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Jiri Olsa <jolsa@kernel.org>, Namhyung Kim <namhyung@kernel.org>,
Ian Rogers <irogers@google.com>,
Adrian Hunter <adrian.hunter@intel.com>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
Kan Liang <kan.liang@linux.intel.com>,
Zhengjun Xing <zhengjun.xing@linux.intel.com>,
linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org,
Edward Baker <edward.baker@intel.com>
Subject: [PATCH v1 7/9] perf vendor events intel: Update westmereex events to v4
Date: Wed, 25 Oct 2023 17:31:47 -0700 [thread overview]
Message-ID: <20231026003149.3287633-7-irogers@google.com> (raw)
In-Reply-To: <20231026003149.3287633-1-irogers@google.com>
Update westmereex events from v3 to v4 fixing a spelling issue.
Signed-off-by: Ian Rogers <irogers@google.com>
---
tools/perf/pmu-events/arch/x86/mapfile.csv | 2 +-
tools/perf/pmu-events/arch/x86/westmereex/pipeline.json | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/tools/perf/pmu-events/arch/x86/mapfile.csv b/tools/perf/pmu-events/arch/x86/mapfile.csv
index 5b455739065b..0dee3de3187c 100644
--- a/tools/perf/pmu-events/arch/x86/mapfile.csv
+++ b/tools/perf/pmu-events/arch/x86/mapfile.csv
@@ -35,7 +35,7 @@ GenuineIntel-6-86,v1.21,snowridgex,core
GenuineIntel-6-8[CD],v1.13,tigerlake,core
GenuineIntel-6-2C,v5,westmereep-dp,core
GenuineIntel-6-25,v4,westmereep-sp,core
-GenuineIntel-6-2F,v3,westmereex,core
+GenuineIntel-6-2F,v4,westmereex,core
AuthenticAMD-23-([12][0-9A-F]|[0-9A-F]),v2,amdzen1,core
AuthenticAMD-23-[[:xdigit:]]+,v1,amdzen2,core
AuthenticAMD-25-([245][[:xdigit:]]|[[:xdigit:]]),v1,amdzen3,core
diff --git a/tools/perf/pmu-events/arch/x86/westmereex/pipeline.json b/tools/perf/pmu-events/arch/x86/westmereex/pipeline.json
index 1c61d18a4b5f..026236558d05 100644
--- a/tools/perf/pmu-events/arch/x86/westmereex/pipeline.json
+++ b/tools/perf/pmu-events/arch/x86/westmereex/pipeline.json
@@ -45,7 +45,7 @@
"UMask": "0x1"
},
{
- "BriefDescription": "Early Branch Prediciton Unit clears",
+ "BriefDescription": "Early Branch Prediction Unit clears",
"EventCode": "0xE8",
"EventName": "BPU_CLEARS.EARLY",
"SampleAfterValue": "2000000",
--
2.42.0.758.gaed0368e0e-goog
next prev parent reply other threads:[~2023-10-26 0:32 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-26 0:31 [PATCH v1 1/9] perf vendor events intel: Update alderlake/alderlake events to v1.23 Ian Rogers
2023-10-26 0:31 ` [PATCH v1 2/9] perf vendor events intel: Update emeraldrapids to v1.01 Ian Rogers
2023-10-26 0:31 ` [PATCH v1 3/9] perf vendor events intel: Update a spelling in haswell/haswellx Ian Rogers
2023-10-26 0:31 ` [PATCH v1 4/9] perf vendor events intel: Add typo fix for ivybridge FP Ian Rogers
2023-10-26 0:31 ` [PATCH v1 5/9] perf vendor events intel: Update knightslanding events to v16 Ian Rogers
2023-10-26 0:31 ` [PATCH v1 6/9] perf vendor events intel: Update meteorlake events to v1.06 Ian Rogers
2023-10-26 0:31 ` Ian Rogers [this message]
2023-10-26 0:31 ` [PATCH v1 8/9] perf vendor events intel: Update bonnell version number to v5 Ian Rogers
2023-10-26 0:31 ` [PATCH v1 9/9] perf vendor events intel: Update tsx_cycles_per_elision metrics Ian Rogers
2023-10-26 18:16 ` [PATCH v1 1/9] perf vendor events intel: Update alderlake/alderlake events to v1.23 Liang, Kan
2023-10-30 19:00 ` Namhyung Kim
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20231026003149.3287633-7-irogers@google.com \
--to=irogers@google.com \
--cc=acme@kernel.org \
--cc=adrian.hunter@intel.com \
--cc=alexander.shishkin@linux.intel.com \
--cc=alexandre.torgue@foss.st.com \
--cc=edward.baker@intel.com \
--cc=jolsa@kernel.org \
--cc=kan.liang@linux.intel.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-perf-users@vger.kernel.org \
--cc=mark.rutland@arm.com \
--cc=mcoquelin.stm32@gmail.com \
--cc=mingo@redhat.com \
--cc=namhyung@kernel.org \
--cc=peterz@infradead.org \
--cc=zhengjun.xing@linux.intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).