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AJvYcCWRcAy4brmv0XhdIpJuXN0IMtargO1m/xq+wNBu8Rj5r6J3qg1Gejk1g0y/VZ/JW0fuH3p3NI9ItRewbp4gUz7IH9YdcBzakndghw+hobPVdQ== X-Gm-Message-State: AOJu0YwcyG0HdFvcdUzPvFMAMiWxSOTpWark0RDILuUB1IkjGl+zJGHX eompMUkXvi6AUQMrEpkjxoVpvPbq0QApxXQs96xc9NbNZtnScDQNbNR3OAb7hMc= X-Google-Smtp-Source: AGHT+IG/18cu0XQrzjjkqrWO02cvxzc2sKclTHZn6KgjzARvIp50etYjTOykyTJQBV988xbbQes5Kw== X-Received: by 2002:a6b:7018:0:b0:7c4:2254:8e59 with SMTP id l24-20020a6b7018000000b007c422548e59mr6880303ioc.5.1708131514686; Fri, 16 Feb 2024 16:58:34 -0800 (PST) Received: from atishp.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id d188-20020a6336c5000000b005dc89957e06sm487655pga.71.2024.02.16.16.58.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 16 Feb 2024 16:58:34 -0800 (PST) From: Atish Patra To: linux-kernel@vger.kernel.org Cc: Atish Patra , Adrian Hunter , Alexander Shishkin , Alexandre Ghiti , Andrew Jones , Anup Patel , Arnaldo Carvalho de Melo , Atish Patra , Christian Brauner , =?UTF-8?q?Cl=C3=A9ment=20L=C3=A9ger?= , Conor Dooley , devicetree@vger.kernel.org, Evan Green , Guo Ren , Heiko Stuebner , Ian Rogers , Ingo Molnar , James Clark , Jing Zhang , Jiri Olsa , Ji Sheng Teoh , John Garry , Jonathan Corbet , Kan Liang , Krzysztof Kozlowski , kvm-riscv@lists.infradead.org, kvm@vger.kernel.org, Ley Foon Tan , linux-doc@vger.kernel.org, linux-perf-users@vger.kernel.org, linux-riscv@lists.infradead.org, Mark Rutland , Namhyung Kim , Palmer Dabbelt , Paul Walmsley , Peter Zijlstra , Rob Herring , Samuel Holland , Weilin Wang , Will Deacon , kaiwenxue1@gmail.com, Yang Jihong Subject: [PATCH RFC 08/20] dt-bindings: riscv: add Ssccfg ISA extension description Date: Fri, 16 Feb 2024 16:57:26 -0800 Message-Id: <20240217005738.3744121-9-atishp@rivosinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240217005738.3744121-1-atishp@rivosinc.com> References: <20240217005738.3744121-1-atishp@rivosinc.com> Precedence: bulk X-Mailing-List: linux-perf-users@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Add description for the Ssccfg extension. Signed-off-by: Atish Patra --- .../devicetree/bindings/riscv/extensions.yaml | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml index 77a9f867e36b..15adeb60441b 100644 --- a/Documentation/devicetree/bindings/riscv/extensions.yaml +++ b/Documentation/devicetree/bindings/riscv/extensions.yaml @@ -128,6 +128,13 @@ properties: changes to interrupts as frozen at commit ccbddab ("Merge pull request #42 from riscv/jhauser-2023-RC4") of riscv-aia. + - const: smcdeleg + description: | + The standard Smcdeleg supervisor-level extension for the machine mode + to delegate the hpmcounters to supvervisor mode so that they are + directlyi accessible in the supervisor mode. This extension depend + on Sscsrind, Zihpm, Zicntr extensions. + - const: smstateen description: | The standard Smstateen extension for controlling access to CSRs @@ -154,6 +161,12 @@ properties: interrupt architecture for supervisor-mode-visible csr and behavioural changes to interrupts as frozen at commit ccbddab ("Merge pull request #42 from riscv/jhauser-2023-RC4") of riscv-aia. + - const: ssccfg + description: | + The standard Ssccfg supervisor-level extension for configuring + the delegated hpmcounters to be accessible directly in supervisor + mode. This extension depend on Sscsrind, Smcdeleg, Zihpm, Zicntr + extensions. - const: sscofpmf description: | -- 2.34.1