From: Ian Rogers <irogers@google.com>
To: Sandipan Das <sandipan.das@amd.com>,
Ravi Bangoria <ravi.bangoria@amd.com>,
Peter Zijlstra <peterz@infradead.org>,
Ingo Molnar <mingo@redhat.com>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
Namhyung Kim <namhyung@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Jiri Olsa <jolsa@kernel.org>, Ian Rogers <irogers@google.com>,
Adrian Hunter <adrian.hunter@intel.com>,
John Garry <john.g.garry@oracle.com>,
Kan Liang <kan.liang@linux.intel.com>,
Jing Zhang <renyu.zj@linux.alibaba.com>,
Thomas Richter <tmricht@linux.ibm.com>,
James Clark <james.clark@arm.com>,
linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org,
Stephane Eranian <eranian@google.com>
Subject: [PATCH v1 10/13] perf jevents: Add load store breakdown metrics ldst for AMD
Date: Wed, 28 Feb 2024 16:15:34 -0800 [thread overview]
Message-ID: <20240229001537.4158049-11-irogers@google.com> (raw)
In-Reply-To: <20240229001537.4158049-1-irogers@google.com>
Give breakdown of number of instructions. Use the counter mask (cmask)
to show the number of cycles taken to retire the instructions.
Signed-off-by: Ian Rogers <irogers@google.com>
---
tools/perf/pmu-events/amd_metrics.py | 75 ++++++++++++++++++++++++++++
1 file changed, 75 insertions(+)
diff --git a/tools/perf/pmu-events/amd_metrics.py b/tools/perf/pmu-events/amd_metrics.py
index f4a4ece551ef..6b182a9bbfe5 100755
--- a/tools/perf/pmu-events/amd_metrics.py
+++ b/tools/perf/pmu-events/amd_metrics.py
@@ -278,6 +278,80 @@ def AmdItlb():
], description="Instruction TLB breakdown")
+def AmdLdSt() -> MetricGroup:
+ ldst_ld = Event("ls_dispatch.ld_dispatch")
+ ldst_st = Event("ls_dispatch.store_dispatch")
+ ldst_ldc1 = Event(f"{ldst_ld}/cmask=1/")
+ ldst_stc1 = Event(f"{ldst_st}/cmask=1/")
+ ldst_ldc2 = Event(f"{ldst_ld}/cmask=2/")
+ ldst_stc2 = Event(f"{ldst_st}/cmask=2/")
+ ldst_ldc3 = Event(f"{ldst_ld}/cmask=3/")
+ ldst_stc3 = Event(f"{ldst_st}/cmask=3/")
+ ldst_cyc = Event("ls_not_halted_cyc")
+
+ ld_rate = d_ratio(ldst_ld, interval_sec)
+ st_rate = d_ratio(ldst_st, interval_sec)
+
+ ld_v1 = max(ldst_ldc1 - ldst_ldc2, 0)
+ ld_v2 = max(ldst_ldc2 - ldst_ldc3, 0)
+ ld_v3 = ldst_ldc3
+
+ st_v1 = max(ldst_stc1 - ldst_stc2, 0)
+ st_v2 = max(ldst_stc2 - ldst_stc3, 0)
+ st_v3 = ldst_stc3
+
+ return MetricGroup("ldst", [
+ MetricGroup("ldst_total", [
+ Metric("ldst_total_ld", "Number of loads dispatched per second.",
+ ld_rate, "insns/sec"),
+ Metric("ldst_total_st", "Number of stores dispatched per second.",
+ st_rate, "insns/sec"),
+ ]),
+ MetricGroup("ldst_percent_insn", [
+ Metric("ldst_percent_insn_ld",
+ "Load instructions as a percentage of all instructions.",
+ d_ratio(ldst_ld, ins), "100%"),
+ Metric("ldst_percent_insn_st",
+ "Store instructions as a percentage of all instructions.",
+ d_ratio(ldst_st, ins), "100%"),
+ ]),
+ MetricGroup("ldst_ret_loads_per_cycle", [
+ Metric(
+ "ldst_ret_loads_per_cycle_1",
+ "Load instructions retiring in 1 cycle as a percentage of all "
+ "unhalted cycles.", d_ratio(ld_v1, ldst_cyc), "100%"),
+ Metric(
+ "ldst_ret_loads_per_cycle_2",
+ "Load instructions retiring in 2 cycles as a percentage of all "
+ "unhalted cycles.", d_ratio(ld_v2, ldst_cyc), "100%"),
+ Metric(
+ "ldst_ret_loads_per_cycle_3",
+ "Load instructions retiring in 3 or more cycles as a percentage"
+ "of all unhalted cycles.", d_ratio(ld_v3, ldst_cyc), "100%"),
+ ]),
+ MetricGroup("ldst_ret_stores_per_cycle", [
+ Metric(
+ "ldst_ret_stores_per_cycle_1",
+ "Store instructions retiring in 1 cycle as a percentage of all "
+ "unhalted cycles.", d_ratio(st_v1, ldst_cyc), "100%"),
+ Metric(
+ "ldst_ret_stores_per_cycle_2",
+ "Store instructions retiring in 2 cycles as a percentage of all "
+ "unhalted cycles.", d_ratio(st_v2, ldst_cyc), "100%"),
+ Metric(
+ "ldst_ret_stores_per_cycle_3",
+ "Store instructions retiring in 3 or more cycles as a percentage"
+ "of all unhalted cycles.", d_ratio(st_v3, ldst_cyc), "100%"),
+ ]),
+ MetricGroup("ldst_insn_bt", [
+ Metric("ldst_insn_bt_ld", "Number of instructions between loads.",
+ d_ratio(ins, ldst_ld), "insns"),
+ Metric("ldst_insn_bt_st", "Number of instructions between stores.",
+ d_ratio(ins, ldst_st), "insns"),
+ ])
+ ], description="Breakdown of load/store instructions")
+
+
def AmdHwpf():
"""Returns a MetricGroup representing AMD hardware prefetch metrics."""
if zen_model <= 1:
@@ -488,6 +562,7 @@ all_metrics = MetricGroup("", [
AmdBr(),
AmdDtlb(),
AmdItlb(),
+ AmdLdSt(),
AmdHwpf(),
AmdSwpf(),
AmdUpc(),
--
2.44.0.278.ge034bb2e1d-goog
next prev parent reply other threads:[~2024-02-29 0:16 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-29 0:15 [PATCH v1 00/13] Python generated AMD Zen metrics Ian Rogers
2024-02-29 0:15 ` [PATCH v1 01/13] perf jevents: Add RAPL event metric for AMD zen models Ian Rogers
2024-02-29 0:15 ` [PATCH v1 02/13] perf jevents: Add idle " Ian Rogers
2024-02-29 0:15 ` [PATCH v1 03/13] perf jevents: Add upc metric for uops per cycle for AMD Ian Rogers
2024-02-29 0:15 ` [PATCH v1 04/13] perf jevents: Add br metric group for branch statistics on AMD Ian Rogers
2024-02-29 0:15 ` [PATCH v1 05/13] perf jevents: Add software prefetch (swpf) metric group for AMD Ian Rogers
2024-02-29 0:15 ` [PATCH v1 06/13] perf jevents: Add hardware prefetch (hwpf) " Ian Rogers
2024-02-29 0:15 ` [PATCH v1 07/13] perf jevents: Add itlb " Ian Rogers
2024-02-29 0:15 ` [PATCH v1 08/13] perf jevents: Add dtlb " Ian Rogers
2024-02-29 0:15 ` [PATCH v1 09/13] perf jevents: Add uncore l3 " Ian Rogers
2024-02-29 0:15 ` Ian Rogers [this message]
2024-02-29 0:15 ` [PATCH v1 11/13] perf jevents: Add ILP metrics " Ian Rogers
2024-02-29 0:15 ` [PATCH v1 12/13] perf jevents: Add context switch " Ian Rogers
2024-02-29 0:15 ` [PATCH v1 13/13] perf jevents: Add cycles breakdown metric " Ian Rogers
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