From: James Clark <james.clark@arm.com>
To: linux-perf-users@vger.kernel.org,
gankulkarni@os.amperecomputing.com,
scclevenger@os.amperecomputing.com, coresight@lists.linaro.org,
suzuki.poulose@arm.com, mike.leach@linaro.org
Cc: James Clark <james.clark@arm.com>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
Peter Zijlstra <peterz@infradead.org>,
Ingo Molnar <mingo@redhat.com>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
Namhyung Kim <namhyung@kernel.org>,
Mark Rutland <mark.rutland@arm.com>, Jiri Olsa <jolsa@kernel.org>,
Ian Rogers <irogers@google.com>,
Adrian Hunter <adrian.hunter@intel.com>,
John Garry <john.g.garry@oracle.com>,
Will Deacon <will@kernel.org>, Leo Yan <leo.yan@linux.dev>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
linux-stm32@st-md-mailman.stormreply.com
Subject: [PATCH 11/17] coresight: Expose map arugment in trace ID API
Date: Mon, 29 Apr 2024 16:21:57 +0100 [thread overview]
Message-ID: <20240429152207.479221-13-james.clark@arm.com> (raw)
In-Reply-To: <20240429152207.479221-1-james.clark@arm.com>
...
System ID functions are unchanged because they will always use the
default map.
Signed-off-by: James Clark <james.clark@arm.com>
---
.../hwtracing/coresight/coresight-etm-perf.c | 5 +++--
.../coresight/coresight-etm3x-core.c | 5 +++--
.../coresight/coresight-etm4x-core.c | 5 +++--
.../hwtracing/coresight/coresight-trace-id.c | 22 +++++++------------
.../hwtracing/coresight/coresight-trace-id.h | 9 +++++---
5 files changed, 23 insertions(+), 23 deletions(-)
diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c
index c0c60e6a1703..4afb9d29f355 100644
--- a/drivers/hwtracing/coresight/coresight-etm-perf.c
+++ b/drivers/hwtracing/coresight/coresight-etm-perf.c
@@ -232,7 +232,7 @@ static void free_event_data(struct work_struct *work)
if (!(IS_ERR_OR_NULL(*ppath)))
coresight_release_path(*ppath);
*ppath = NULL;
- coresight_trace_id_put_cpu_id(cpu);
+ coresight_trace_id_put_cpu_id(cpu, coresight_trace_id_map_default());
}
/* mark perf event as done for trace id allocator */
@@ -401,7 +401,8 @@ static void *etm_setup_aux(struct perf_event *event, void **pages,
}
/* ensure we can allocate a trace ID for this CPU */
- trace_id = coresight_trace_id_get_cpu_id(cpu);
+ trace_id = coresight_trace_id_get_cpu_id(cpu,
+ coresight_trace_id_map_default());
if (!IS_VALID_CS_TRACE_ID(trace_id)) {
cpumask_clear_cpu(cpu, mask);
coresight_release_path(path);
diff --git a/drivers/hwtracing/coresight/coresight-etm3x-core.c b/drivers/hwtracing/coresight/coresight-etm3x-core.c
index 9d5c1391ffb1..4149e7675ceb 100644
--- a/drivers/hwtracing/coresight/coresight-etm3x-core.c
+++ b/drivers/hwtracing/coresight/coresight-etm3x-core.c
@@ -465,7 +465,8 @@ int etm_read_alloc_trace_id(struct etm_drvdata *drvdata)
*
* trace id function has its own lock
*/
- trace_id = coresight_trace_id_get_cpu_id(drvdata->cpu);
+ trace_id = coresight_trace_id_get_cpu_id(drvdata->cpu,
+ coresight_trace_id_map_default());
if (IS_VALID_CS_TRACE_ID(trace_id))
drvdata->traceid = (u8)trace_id;
else
@@ -477,7 +478,7 @@ int etm_read_alloc_trace_id(struct etm_drvdata *drvdata)
void etm_release_trace_id(struct etm_drvdata *drvdata)
{
- coresight_trace_id_put_cpu_id(drvdata->cpu);
+ coresight_trace_id_put_cpu_id(drvdata->cpu, coresight_trace_id_map_default());
}
static int etm_enable_perf(struct coresight_device *csdev,
diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/hwtracing/coresight/coresight-etm4x-core.c
index c2ca4a02dfce..562ef6cb72d8 100644
--- a/drivers/hwtracing/coresight/coresight-etm4x-core.c
+++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c
@@ -241,7 +241,8 @@ int etm4_read_alloc_trace_id(struct etmv4_drvdata *drvdata)
* or return the one currently allocated.
* The trace id function has its own lock
*/
- trace_id = coresight_trace_id_get_cpu_id(drvdata->cpu);
+ trace_id = coresight_trace_id_get_cpu_id(drvdata->cpu,
+ coresight_trace_id_map_default());
if (IS_VALID_CS_TRACE_ID(trace_id))
drvdata->trcid = (u8)trace_id;
else
@@ -253,7 +254,7 @@ int etm4_read_alloc_trace_id(struct etmv4_drvdata *drvdata)
void etm4_release_trace_id(struct etmv4_drvdata *drvdata)
{
- coresight_trace_id_put_cpu_id(drvdata->cpu);
+ coresight_trace_id_put_cpu_id(drvdata->cpu, coresight_trace_id_map_default());
}
struct etm4_enable_arg {
diff --git a/drivers/hwtracing/coresight/coresight-trace-id.c b/drivers/hwtracing/coresight/coresight-trace-id.c
index 19005b5b4dc4..45ddd50d09a6 100644
--- a/drivers/hwtracing/coresight/coresight-trace-id.c
+++ b/drivers/hwtracing/coresight/coresight-trace-id.c
@@ -12,7 +12,7 @@
#include "coresight-trace-id.h"
-/* Default trace ID map. Used on systems that don't require per sink mappings */
+/* Default trace ID map. Used in sysfs mode and for system sources */
static struct coresight_trace_id_map id_map_default;
/* maintain a record of the mapping of IDs and pending releases per cpu */
@@ -152,7 +152,7 @@ static void coresight_trace_id_release_all_pending(void)
DUMP_ID_MAP(id_map);
}
-static int coresight_trace_id_map_get_cpu_id(int cpu, struct coresight_trace_id_map *id_map)
+int coresight_trace_id_get_cpu_id(int cpu, struct coresight_trace_id_map *id_map)
{
unsigned long flags;
int id;
@@ -195,8 +195,9 @@ static int coresight_trace_id_map_get_cpu_id(int cpu, struct coresight_trace_id_
DUMP_ID_MAP(id_map);
return id;
}
+EXPORT_SYMBOL_GPL(coresight_trace_id_get_cpu_id);
-static void coresight_trace_id_map_put_cpu_id(int cpu, struct coresight_trace_id_map *id_map)
+void coresight_trace_id_put_cpu_id(int cpu, struct coresight_trace_id_map *id_map)
{
unsigned long flags;
int id;
@@ -222,6 +223,7 @@ static void coresight_trace_id_map_put_cpu_id(int cpu, struct coresight_trace_id
DUMP_ID_CPU(cpu, id);
DUMP_ID_MAP(id_map);
}
+EXPORT_SYMBOL_GPL(coresight_trace_id_put_cpu_id);
static int coresight_trace_id_map_get_system_id(struct coresight_trace_id_map *id_map)
{
@@ -250,19 +252,11 @@ static void coresight_trace_id_map_put_system_id(struct coresight_trace_id_map *
DUMP_ID_MAP(id_map);
}
-/* API functions */
-
-int coresight_trace_id_get_cpu_id(int cpu)
-{
- return coresight_trace_id_map_get_cpu_id(cpu, &id_map_default);
-}
-EXPORT_SYMBOL_GPL(coresight_trace_id_get_cpu_id);
-
-void coresight_trace_id_put_cpu_id(int cpu)
+struct coresight_trace_id_map *coresight_trace_id_map_default(void)
{
- coresight_trace_id_map_put_cpu_id(cpu, &id_map_default);
+ return &id_map_default;
}
-EXPORT_SYMBOL_GPL(coresight_trace_id_put_cpu_id);
+EXPORT_SYMBOL_GPL(coresight_trace_id_map_default);
int coresight_trace_id_read_cpu_id(int cpu)
{
diff --git a/drivers/hwtracing/coresight/coresight-trace-id.h b/drivers/hwtracing/coresight/coresight-trace-id.h
index 49438a96fcc6..54b9d8ed903b 100644
--- a/drivers/hwtracing/coresight/coresight-trace-id.h
+++ b/drivers/hwtracing/coresight/coresight-trace-id.h
@@ -42,7 +42,10 @@
#define IS_VALID_CS_TRACE_ID(id) \
((id > CORESIGHT_TRACE_ID_RES_0) && (id < CORESIGHT_TRACE_ID_RES_TOP))
-/* Allocate and release IDs for a single default trace ID map */
+/**
+ * Get the global map that's used by sysfs
+ */
+struct coresight_trace_id_map *coresight_trace_id_map_default(void);
/**
* Read and optionally allocate a CoreSight trace ID and associate with a CPU.
@@ -57,7 +60,7 @@
*
* return: CoreSight trace ID or -EINVAL if allocation impossible.
*/
-int coresight_trace_id_get_cpu_id(int cpu);
+int coresight_trace_id_get_cpu_id(int cpu, struct coresight_trace_id_map *id_map);
/**
* Release an allocated trace ID associated with the CPU.
@@ -70,7 +73,7 @@ int coresight_trace_id_get_cpu_id(int cpu);
*
* @cpu: The CPU index to release the associated trace ID.
*/
-void coresight_trace_id_put_cpu_id(int cpu);
+void coresight_trace_id_put_cpu_id(int cpu, struct coresight_trace_id_map *id_map);
/**
* Read the current allocated CoreSight Trace ID value for the CPU.
--
2.34.1
next prev parent reply other threads:[~2024-04-29 15:25 UTC|newest]
Thread overview: 51+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-29 15:21 [PATCH 00/17] coresight: Use per-sink trace ID maps for Perf sessions James Clark
2024-04-29 15:21 ` [PATCH 01/17] perf cs-etm: Print error for new PERF_RECORD_AUX_OUTPUT_HW_ID versions James Clark
2024-05-07 3:47 ` Anshuman Khandual
2024-05-07 10:06 ` James Clark
2024-05-07 10:57 ` Anshuman Khandual
2024-05-07 14:54 ` Arnaldo Carvalho de Melo
2024-04-29 15:21 ` [PATCH 02/17] perf auxtrace: Allow number of queues to be specified James Clark
2024-04-30 6:36 ` Adrian Hunter
2024-05-07 4:26 ` Anshuman Khandual
2024-04-29 15:21 ` [PATCH 03/17] perf: cs-etm: Create decoders after both AUX and HW_ID search passes James Clark
2024-04-29 15:21 ` [PATCH 04/17] perf: cs-etm: Allocate queues for all CPUs James Clark
2024-04-29 15:21 ` [PATCH 05/17] perf: cs-etm: Move traceid_list to each queue James Clark
2024-04-29 15:21 ` [PATCH 06/17] perf: cs-etm: Create decoders based on the trace ID mappings James Clark
2024-04-29 15:21 ` [PATCH 07/17] perf: cs-etm: Support version 0.1 of HW_ID packets James Clark
2024-04-29 15:21 ` [PATCH 08/17] coresight: Remove unused stubs James Clark
2024-05-01 11:06 ` Mike Leach
2024-05-07 4:15 ` Anshuman Khandual
2024-04-29 15:21 ` [PATCH 09/17] coresight: Clarify comments around the PID of the sink owner James Clark
2024-05-01 11:07 ` Mike Leach
2024-05-07 4:25 ` Anshuman Khandual
2024-04-29 15:21 ` [PATCH 10/17] coresight: Move struct coresight_trace_id_map to common header James Clark
2024-05-01 11:11 ` Mike Leach
2024-05-07 5:50 ` Anshuman Khandual
2024-04-29 15:21 ` [PATCH 11/17] coresight: Expose map argument in trace ID API James Clark
2024-05-01 10:31 ` Mike Leach
2024-05-17 10:09 ` James Clark
2024-05-07 6:00 ` Anshuman Khandual
2024-04-29 15:21 ` James Clark [this message]
2024-04-29 15:30 ` [PATCH 11/17] coresight: Expose map arugment " James Clark
2024-04-29 15:21 ` [PATCH 12/17] coresight: Make CPU id map a property of a trace ID map James Clark
2024-05-07 6:22 ` Anshuman Khandual
2024-05-07 9:57 ` James Clark
2024-04-29 15:21 ` [PATCH 13/17] coresight: Pass trace ID map into source enable James Clark
2024-05-07 6:46 ` Anshuman Khandual
2024-05-07 10:49 ` Suzuki K Poulose
2024-04-29 15:22 ` [PATCH 14/17] coresight: Use per-sink trace ID maps for Perf sessions James Clark
2024-05-03 9:43 ` Mike Leach
2024-05-03 14:31 ` James Clark
2024-05-07 10:52 ` Suzuki K Poulose
2024-05-17 10:07 ` James Clark
2024-04-29 15:22 ` [PATCH 15/17] coresight: Remove pending trace ID release mechanism James Clark
2024-04-29 15:22 ` [PATCH 16/17] coresight: Re-emit trace IDs when the sink changes in per-thread mode James Clark
2024-05-07 11:05 ` Suzuki K Poulose
2024-05-17 10:01 ` James Clark
2024-04-29 15:22 ` [PATCH 17/17] coresight: Emit HW_IDs for all ETMs that are using the sink James Clark
2024-05-03 12:40 ` [PATCH 00/17] coresight: Use per-sink trace ID maps for Perf sessions Mike Leach
2024-05-17 10:45 ` James Clark
2024-05-03 20:23 ` Arnaldo Carvalho de Melo
2024-05-07 10:01 ` James Clark
2024-05-07 14:59 ` Arnaldo Carvalho de Melo
2024-05-07 11:02 ` Ganapatrao Kulkarni
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