Re: Question about using the perf c2c in UMA system

Re: Question about using the perf c2c in UMA system

[Leo Yan]

Hi Baisheng,

On Mon, Apr 08, 2024 at 10:52:59AM +0000, ?????? (Baisheng Gao) wrote:
> Hi linux-perf-users,
> 
> My perf tool version is 6.6, and I compiled it to run on an Android system.
> The problem is:
> 
> # ./perf c2c report
> Failed setup nodes
> 
> According to the articles on the Internet, it seems that the perf c2c is only supported
> in NUMA system. However, the cache false sharing does not exist only in NUMA, and
> the UMA system has also the problem. So I wonder how to support perf c2c in UMA.

The log above is related with parsing NUMA nodes, but this doesn't
mean 'perf c2c' must run on NUMA system. My understanding is both
x86_64 (memory event) and Arm64 (SPE) support 'perf c2c' not only on
NUMA.

Thanks,
Leo

Re: Question about using the perf c2c in UMA system

[Ian Rogers]

On Mon, Apr 29, 2024 at 2:43 PM Leo Yan <leo.yan@linux.dev> wrote:
>
> Hi Baisheng,
>
> On Mon, Apr 08, 2024 at 10:52:59AM +0000, ?????? (Baisheng Gao) wrote:
> > Hi linux-perf-users,
> >
> > My perf tool version is 6.6, and I compiled it to run on an Android system.
> > The problem is:
> >
> > # ./perf c2c report
> > Failed setup nodes
> >
> > According to the articles on the Internet, it seems that the perf c2c is only supported
> > in NUMA system. However, the cache false sharing does not exist only in NUMA, and
> > the UMA system has also the problem. So I wonder how to support perf c2c in UMA.
>
> The log above is related with parsing NUMA nodes, but this doesn't
> mean 'perf c2c' must run on NUMA system. My understanding is both
> x86_64 (memory event) and Arm64 (SPE) support 'perf c2c' not only on
> NUMA.

The lack of SPE on most ARM hardware really is a pain. Can we add a
better error message to make it clearer to users that they need a
neoverse CPU? :-)

Thanks,
Ian

> Thanks,
> Leo
>

Re: Question about using the perf c2c in UMA system

[James Clark]

On 30/04/2024 04:40, Ian Rogers wrote:
> On Mon, Apr 29, 2024 at 2:43 PM Leo Yan <leo.yan@linux.dev> wrote:
>>
>> Hi Baisheng,
>>
>> On Mon, Apr 08, 2024 at 10:52:59AM +0000, ?????? (Baisheng Gao) wrote:
>>> Hi linux-perf-users,
>>>
>>> My perf tool version is 6.6, and I compiled it to run on an Android system.
>>> The problem is:
>>>
>>> # ./perf c2c report
>>> Failed setup nodes
>>>
>>> According to the articles on the Internet, it seems that the perf c2c is only supported
>>> in NUMA system. However, the cache false sharing does not exist only in NUMA, and
>>> the UMA system has also the problem. So I wonder how to support perf c2c in UMA.
>>
>> The log above is related with parsing NUMA nodes, but this doesn't
>> mean 'perf c2c' must run on NUMA system. My understanding is both
>> x86_64 (memory event) and Arm64 (SPE) support 'perf c2c' not only on
>> NUMA.
> 
> The lack of SPE on most ARM hardware really is a pain. Can we add a
> better error message to make it clearer to users that they need a
> neoverse CPU? :-)
> 

This issue seems to be about report rather than record, so I'm assuming
that the record worked and SPE is present.

Having said that, the error message for no SPE isn't great, but it's not
that bad either:

  $ perf c2c record
  failed: no PMU supports the memory events

Re: Question about using the perf c2c in UMA system

[Leo Yan]

On Tue, Apr 30, 2024 at 03:36:02PM +0100, James Clark wrote:

[...]

> >> On Mon, Apr 08, 2024 at 10:52:59AM +0000, ?????? (Baisheng Gao) wrote:
> >>> Hi linux-perf-users,
> >>>
> >>> My perf tool version is 6.6, and I compiled it to run on an Android system.
> >>> The problem is:
> >>>
> >>> # ./perf c2c report
> >>> Failed setup nodes
> >>>
> >>> According to the articles on the Internet, it seems that the perf c2c is only supported
> >>> in NUMA system. However, the cache false sharing does not exist only in NUMA, and
> >>> the UMA system has also the problem. So I wonder how to support perf c2c in UMA.
> >>
> >> The log above is related with parsing NUMA nodes, but this doesn't
> >> mean 'perf c2c' must run on NUMA system. My understanding is both
> >> x86_64 (memory event) and Arm64 (SPE) support 'perf c2c' not only on
> >> NUMA.
> > 
> > The lack of SPE on most ARM hardware really is a pain. Can we add a
> > better error message to make it clearer to users that they need a
> > neoverse CPU? :-)

We cannot stick to Arm Neoverse CPUs as Arm SPE is supported on more CPU
variants. On the other hand, I think we need to dynamically detect CPU
feature for SPE to replace current code for binding specific CPU
variants.

> This issue seems to be about report rather than record, so I'm assuming
> that the record worked and SPE is present.

Yes, this issue is for the report command.

@Baisheng, do you mind to share the steps for reproduce this issue or
drop the perf data file with me? Sorry if I missed your sharing.

> Having said that, the error message for no SPE isn't great, but it's not
> that bad either:
> 
>   $ perf c2c record
>   failed: no PMU supports the memory events

This is better than nothing ;-) I will check a bit for a better log.

Thanks,
Leo