From: Athira Rajeev <atrajeev@linux.vnet.ibm.com>
To: acme@kernel.org, jolsa@kernel.org, adrian.hunter@intel.com,
irogers@google.com, namhyung@kernel.org,
segher@kernel.crashing.org, christophe.leroy@csgroup.eu
Cc: linux-perf-users@vger.kernel.org, linuxppc-dev@lists.ozlabs.org,
maddy@linux.ibm.com, atrajeev@linux.vnet.ibm.com,
kjain@linux.ibm.com, disgoel@linux.vnet.ibm.com,
linux-kernel@vger.kernel.org, akanksha@linux.ibm.com
Subject: [PATCH V2 6/9] tools/perf: Update instruction tracking for powerpc
Date: Mon, 6 May 2024 17:49:03 +0530 [thread overview]
Message-ID: <20240506121906.76639-7-atrajeev@linux.vnet.ibm.com> (raw)
In-Reply-To: <20240506121906.76639-1-atrajeev@linux.vnet.ibm.com>
Add instruction tracking function "update_insn_state_powerpc" for
powerpc. Example sequence in powerpc:
ld r10,264(r3)
mr r31,r3
<<after some sequence>
ld r9,312(r31)
Consider ithe sample is pointing to: "ld r9,312(r31)".
Here the memory reference is hit at "312(r31)" where 312 is the offset
and r31 is the source register. Previous instruction sequence shows that
register state of r3 is moved to r31. So to identify the data type for r31
access, the previous instruction ("mr") needs to be tracked and the
state type entry has to be updated. Current instruction tracking support
in perf tools infrastructure is specific to x86. Patch adds this for
powerpc and adds "mr" instruction to be tracked.
Signed-off-by: Athira Rajeev <atrajeev@linux.vnet.ibm.com>
---
.../perf/arch/powerpc/annotate/instructions.c | 63 +++++++++++++++++++
tools/perf/util/annotate-data.c | 9 ++-
tools/perf/util/disasm.c | 1 +
3 files changed, 72 insertions(+), 1 deletion(-)
diff --git a/tools/perf/arch/powerpc/annotate/instructions.c b/tools/perf/arch/powerpc/annotate/instructions.c
index a3f423c27cae..cce7023951fe 100644
--- a/tools/perf/arch/powerpc/annotate/instructions.c
+++ b/tools/perf/arch/powerpc/annotate/instructions.c
@@ -49,6 +49,69 @@ static struct ins_ops *powerpc__associate_instruction_ops(struct arch *arch, con
return ops;
}
+/*
+ * Instruction tracking function to track register state moves.
+ * Example sequence:
+ * ld r10,264(r3)
+ * mr r31,r3
+ * <<after some sequence>
+ * ld r9,312(r31)
+ *
+ * Previous instruction sequence shows that register state of r3
+ * is moved to r31. update_insn_state_powerpc tracks these state
+ * changes
+ */
+#ifdef HAVE_DWARF_SUPPORT
+static void update_insn_state_powerpc(struct type_state *state,
+ struct data_loc_info *dloc, Dwarf_Die *cu_die __maybe_unused,
+ struct disasm_line *dl)
+{
+ struct annotated_insn_loc loc;
+ struct annotated_op_loc *src = &loc.ops[INSN_OP_SOURCE];
+ struct annotated_op_loc *dst = &loc.ops[INSN_OP_TARGET];
+ struct type_state_reg *tsr;
+ u32 insn_offset = dl->al.offset;
+
+ if (annotate_get_insn_location(dloc->arch, dl, &loc) < 0)
+ return;
+
+ if (strncmp(dl->ins.name, "mr", 2))
+ return;
+
+ if (!strncmp(dl->ins.name, "mr", 2)) {
+ int src_reg = src->reg1;
+
+ src->reg1 = dst->reg1;
+ dst->reg1 = src_reg;
+ }
+
+ if (!has_reg_type(state, dst->reg1))
+ return;
+
+ tsr = &state->regs[dst->reg1];
+
+ if (!has_reg_type(state, src->reg1) ||
+ !state->regs[src->reg1].ok) {
+ tsr->ok = false;
+ return;
+ }
+
+ tsr->type = state->regs[src->reg1].type;
+ tsr->kind = state->regs[src->reg1].kind;
+ tsr->ok = true;
+
+ pr_debug("mov [%x] reg%d -> reg%d",
+ insn_offset, src->reg1, dst->reg1);
+ pr_debug_type_name(&tsr->type, tsr->kind);
+}
+#else /* HAVE_DWARF_SUPPORT */
+static void update_insn_state_powerpc(struct type_state *state __maybe_unused, struct data_loc_info *dloc __maybe_unused,
+ Dwarf_Die *cu_die __maybe_unused, struct disasm_line *dl __maybe_unused)
+{
+ return;
+}
+#endif /* HAVE_DWARF_SUPPORT */
+
static int powerpc__annotate_init(struct arch *arch, char *cpuid __maybe_unused)
{
if (!arch->initialized) {
diff --git a/tools/perf/util/annotate-data.c b/tools/perf/util/annotate-data.c
index 9d6d4f472c85..e22ba35c93b2 100644
--- a/tools/perf/util/annotate-data.c
+++ b/tools/perf/util/annotate-data.c
@@ -1079,6 +1079,13 @@ static int find_data_type_insn(struct data_loc_info *dloc,
return ret;
}
+static int arch_supports_insn_tracking(struct data_loc_info *dloc)
+{
+ if ((arch__is(dloc->arch, "x86")) || (arch__is(dloc->arch, "powerpc")))
+ return 1;
+ return 0;
+}
+
/*
* Construct a list of basic blocks for each scope with variables and try to find
* the data type by updating a type state table through instructions.
@@ -1093,7 +1100,7 @@ static int find_data_type_block(struct data_loc_info *dloc,
int ret = -1;
/* TODO: other architecture support */
- if (!arch__is(dloc->arch, "x86"))
+ if (!arch_supports_insn_tracking(dloc))
return -1;
prev_dst_ip = dst_ip = dloc->ip;
diff --git a/tools/perf/util/disasm.c b/tools/perf/util/disasm.c
index f41a0fadeab4..ac6b8b8da38a 100644
--- a/tools/perf/util/disasm.c
+++ b/tools/perf/util/disasm.c
@@ -151,6 +151,7 @@ static struct arch architectures[] = {
{
.name = "powerpc",
.init = powerpc__annotate_init,
+ .update_insn_state = update_insn_state_powerpc,
},
{
.name = "riscv64",
--
2.43.0
next prev parent reply other threads:[~2024-05-06 12:19 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-06 12:18 [PATCH V2 0/9] Add data type profiling support for powerpc Athira Rajeev
2024-05-06 12:18 ` [PATCH V2 1/9] tools/perf: Move the data structures related to register type to header file Athira Rajeev
2024-05-06 12:18 ` [PATCH V2 2/9] tools/perf: Add "update_insn_state" callback function to handle arch specific instruction tracking Athira Rajeev
2024-05-06 12:19 ` [PATCH V2 3/9] tools/perf: Fix a comment about multi_regs in extract_reg_offset function Athira Rajeev
2024-05-07 4:40 ` Namhyung Kim
2024-05-07 14:52 ` Arnaldo Carvalho de Melo
2024-05-06 12:19 ` [PATCH V2 4/9] tools/perf: Add support to capture and parse raw instruction in objdump Athira Rajeev
2024-05-07 4:57 ` Namhyung Kim
2024-05-07 9:35 ` Christophe Leroy
2024-05-09 17:26 ` Athira Rajeev
2024-05-09 20:55 ` Namhyung Kim
2024-05-10 14:26 ` Arnaldo Carvalho de Melo
2024-05-22 13:58 ` Athira Rajeev
2024-05-06 12:19 ` [PATCH V2 5/9] tools/perf: Update parameters for reg extract functions to use raw instruction on powerpc Athira Rajeev
2024-05-07 9:48 ` Christophe Leroy
2024-05-22 14:06 ` Athira Rajeev
2024-05-06 12:19 ` Athira Rajeev [this message]
2024-05-07 9:52 ` [PATCH V2 6/9] tools/perf: Update instruction tracking for powerpc Christophe Leroy
2024-05-23 13:58 ` Athira Rajeev
2024-05-06 12:19 ` [PATCH V2 7/9] tools/perf: Update instruction tracking with add instruction Athira Rajeev
2024-05-07 9:58 ` Christophe Leroy
2024-05-23 13:55 ` Athira Rajeev
2024-05-06 12:19 ` [PATCH V2 8/9] tools/perf: Add support to find global register variables using find_data_type_global_reg Athira Rajeev
2024-05-07 10:03 ` Christophe Leroy
2024-05-24 12:17 ` Athira Rajeev
2024-05-24 12:47 ` Christophe Leroy
2024-05-06 12:19 ` [PATCH V2 9/9] tools/perf: Add support for global_die to capture name of variable in case of register defined variable Athira Rajeev
2024-05-07 4:39 ` [PATCH V2 0/9] Add data type profiling support for powerpc Namhyung Kim
2024-05-13 7:32 ` Athira Rajeev
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