From: James Clark <james.clark@arm.com>
To: coresight@lists.linaro.org, suzuki.poulose@arm.com,
gankulkarni@os.amperecomputing.com, mike.leach@linaro.org,
leo.yan@linux.dev, anshuman.khandual@arm.com
Cc: James Clark <james.clark@arm.com>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
Peter Zijlstra <peterz@infradead.org>,
Ingo Molnar <mingo@redhat.com>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
Namhyung Kim <namhyung@kernel.org>,
Mark Rutland <mark.rutland@arm.com>, Jiri Olsa <jolsa@kernel.org>,
Ian Rogers <irogers@google.com>,
Adrian Hunter <adrian.hunter@intel.com>,
"Liang, Kan" <kan.liang@linux.intel.com>,
John Garry <john.g.garry@oracle.com>,
Will Deacon <will@kernel.org>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
linux-stm32@st-md-mailman.stormreply.com,
linux-perf-users@vger.kernel.org
Subject: [PATCH v3 07/14] coresight: Clarify comments around the PID of the sink owner
Date: Tue, 11 Jun 2024 16:02:18 +0100 [thread overview]
Message-ID: <20240611150228.1802828-8-james.clark@arm.com> (raw)
In-Reply-To: <20240611150228.1802828-1-james.clark@arm.com>
"Process being monitored" and "pid of the process to monitor" imply that
this would be the same PID if there were two sessions targeting the same
process. But this is actually the PID of the process that did the Perf
event open call, rather than the target of the session. So update the
comments to make this clearer.
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Reviewed-by: Mike Leach <mike.leach@linaro.org>
Signed-off-by: James Clark <james.clark@arm.com>
---
drivers/hwtracing/coresight/coresight-tmc-etr.c | 5 +++--
drivers/hwtracing/coresight/coresight-tmc.h | 5 +++--
2 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c
index e75428fa1592..8962fc27d04f 100644
--- a/drivers/hwtracing/coresight/coresight-tmc-etr.c
+++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c
@@ -36,7 +36,8 @@ struct etr_buf_hw {
* etr_perf_buffer - Perf buffer used for ETR
* @drvdata - The ETR drvdaga this buffer has been allocated for.
* @etr_buf - Actual buffer used by the ETR
- * @pid - The PID this etr_perf_buffer belongs to.
+ * @pid - The PID of the session owner that etr_perf_buffer
+ * belongs to.
* @snaphost - Perf session mode
* @nr_pages - Number of pages in the ring buffer.
* @pages - Array of Pages in the ring buffer.
@@ -1662,7 +1663,7 @@ static int tmc_enable_etr_sink_perf(struct coresight_device *csdev, void *data)
goto unlock_out;
}
- /* Get a handle on the pid of the process to monitor */
+ /* Get a handle on the pid of the session owner */
pid = etr_perf->pid;
/* Do not proceed if this device is associated with another session */
diff --git a/drivers/hwtracing/coresight/coresight-tmc.h b/drivers/hwtracing/coresight/coresight-tmc.h
index c77763b49de0..2671926be62a 100644
--- a/drivers/hwtracing/coresight/coresight-tmc.h
+++ b/drivers/hwtracing/coresight/coresight-tmc.h
@@ -171,8 +171,9 @@ struct etr_buf {
* @csdev: component vitals needed by the framework.
* @miscdev: specifics to handle "/dev/xyz.tmc" entry.
* @spinlock: only one at a time pls.
- * @pid: Process ID of the process being monitored by the session
- * that is using this component.
+ * @pid: Process ID of the process that owns the session that is using
+ * this component. For example this would be the pid of the Perf
+ * process.
* @buf: Snapshot of the trace data for ETF/ETB.
* @etr_buf: details of buffer used in TMC-ETR
* @len: size of the available trace for ETF/ETB.
--
2.34.1
next prev parent reply other threads:[~2024-06-11 15:03 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-11 15:02 [PATCH v3 00/14] coresight: Use per-sink trace ID maps for Perf sessions James Clark
2024-06-11 15:02 ` [PATCH v3 01/14] perf: cs-etm: Create decoders after both AUX and HW_ID search passes James Clark
2024-06-11 15:02 ` [PATCH v3 02/14] perf: cs-etm: Allocate queues for all CPUs James Clark
2024-06-11 15:02 ` [PATCH v3 03/14] perf: cs-etm: Move traceid_list to each queue James Clark
2024-06-11 15:02 ` [PATCH v3 04/14] perf: cs-etm: Create decoders based on the trace ID mappings James Clark
2024-06-11 15:02 ` [PATCH v3 05/14] perf: cs-etm: Support version 0.1 of HW_ID packets James Clark
2024-06-11 15:02 ` [PATCH v3 06/14] coresight: Remove unused ETM Perf stubs James Clark
2024-06-11 15:02 ` James Clark [this message]
2024-06-11 15:02 ` [PATCH v3 08/14] coresight: Move struct coresight_trace_id_map to common header James Clark
2024-06-11 15:02 ` [PATCH v3 09/14] coresight: Expose map arguments in trace ID API James Clark
2024-06-11 15:02 ` [PATCH v3 10/14] coresight: Make CPU id map a property of a trace ID map James Clark
2024-06-11 15:02 ` [PATCH v3 11/14] coresight: Use per-sink trace ID maps for Perf sessions James Clark
2024-06-11 15:02 ` [PATCH v3 12/14] coresight: Remove pending trace ID release mechanism James Clark
2024-06-11 15:02 ` [PATCH v3 13/14] coresight: Emit sink ID in the HW_ID packets James Clark
2024-06-11 15:02 ` [PATCH v3 14/14] coresight: Make trace ID map spinlock local to the map James Clark
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