From: James Clark <james.clark@arm.com>
To: coresight@lists.linaro.org, suzuki.poulose@arm.com,
gankulkarni@os.amperecomputing.com, mike.leach@linaro.org,
leo.yan@linux.dev, anshuman.khandual@arm.com
Cc: James Clark <james.clark@arm.com>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
Peter Zijlstra <peterz@infradead.org>,
Ingo Molnar <mingo@redhat.com>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
Namhyung Kim <namhyung@kernel.org>,
Mark Rutland <mark.rutland@arm.com>, Jiri Olsa <jolsa@kernel.org>,
Ian Rogers <irogers@google.com>,
Adrian Hunter <adrian.hunter@intel.com>,
"Liang, Kan" <kan.liang@linux.intel.com>,
John Garry <john.g.garry@oracle.com>,
Will Deacon <will@kernel.org>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
linux-stm32@st-md-mailman.stormreply.com,
linux-perf-users@vger.kernel.org
Subject: [PATCH v3 08/14] coresight: Move struct coresight_trace_id_map to common header
Date: Tue, 11 Jun 2024 16:02:19 +0100 [thread overview]
Message-ID: <20240611150228.1802828-9-james.clark@arm.com> (raw)
In-Reply-To: <20240611150228.1802828-1-james.clark@arm.com>
The trace ID maps will need to be created and stored by the core and
Perf code so move the definition up to the common header.
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Reviewed-by: Mike Leach <mike.leach@linaro.org>
Signed-off-by: James Clark <james.clark@arm.com>
---
.../hwtracing/coresight/coresight-trace-id.c | 1 +
.../hwtracing/coresight/coresight-trace-id.h | 19 -------------------
include/linux/coresight.h | 18 ++++++++++++++++++
3 files changed, 19 insertions(+), 19 deletions(-)
diff --git a/drivers/hwtracing/coresight/coresight-trace-id.c b/drivers/hwtracing/coresight/coresight-trace-id.c
index af5b4ef59cea..19005b5b4dc4 100644
--- a/drivers/hwtracing/coresight/coresight-trace-id.c
+++ b/drivers/hwtracing/coresight/coresight-trace-id.c
@@ -3,6 +3,7 @@
* Copyright (c) 2022, Linaro Limited, All rights reserved.
* Author: Mike Leach <mike.leach@linaro.org>
*/
+#include <linux/coresight.h>
#include <linux/coresight-pmu.h>
#include <linux/cpumask.h>
#include <linux/kernel.h>
diff --git a/drivers/hwtracing/coresight/coresight-trace-id.h b/drivers/hwtracing/coresight/coresight-trace-id.h
index 3797777d367e..49438a96fcc6 100644
--- a/drivers/hwtracing/coresight/coresight-trace-id.h
+++ b/drivers/hwtracing/coresight/coresight-trace-id.h
@@ -32,10 +32,6 @@
#include <linux/bitops.h>
#include <linux/types.h>
-
-/* architecturally we have 128 IDs some of which are reserved */
-#define CORESIGHT_TRACE_IDS_MAX 128
-
/* ID 0 is reserved */
#define CORESIGHT_TRACE_ID_RES_0 0
@@ -46,21 +42,6 @@
#define IS_VALID_CS_TRACE_ID(id) \
((id > CORESIGHT_TRACE_ID_RES_0) && (id < CORESIGHT_TRACE_ID_RES_TOP))
-/**
- * Trace ID map.
- *
- * @used_ids: Bitmap to register available (bit = 0) and in use (bit = 1) IDs.
- * Initialised so that the reserved IDs are permanently marked as
- * in use.
- * @pend_rel_ids: CPU IDs that have been released by the trace source but not
- * yet marked as available, to allow re-allocation to the same
- * CPU during a perf session.
- */
-struct coresight_trace_id_map {
- DECLARE_BITMAP(used_ids, CORESIGHT_TRACE_IDS_MAX);
- DECLARE_BITMAP(pend_rel_ids, CORESIGHT_TRACE_IDS_MAX);
-};
-
/* Allocate and release IDs for a single default trace ID map */
/**
diff --git a/include/linux/coresight.h b/include/linux/coresight.h
index f09ace92176e..c16c61a8411d 100644
--- a/include/linux/coresight.h
+++ b/include/linux/coresight.h
@@ -218,6 +218,24 @@ struct coresight_sysfs_link {
const char *target_name;
};
+/* architecturally we have 128 IDs some of which are reserved */
+#define CORESIGHT_TRACE_IDS_MAX 128
+
+/**
+ * Trace ID map.
+ *
+ * @used_ids: Bitmap to register available (bit = 0) and in use (bit = 1) IDs.
+ * Initialised so that the reserved IDs are permanently marked as
+ * in use.
+ * @pend_rel_ids: CPU IDs that have been released by the trace source but not
+ * yet marked as available, to allow re-allocation to the same
+ * CPU during a perf session.
+ */
+struct coresight_trace_id_map {
+ DECLARE_BITMAP(used_ids, CORESIGHT_TRACE_IDS_MAX);
+ DECLARE_BITMAP(pend_rel_ids, CORESIGHT_TRACE_IDS_MAX);
+};
+
/**
* struct coresight_device - representation of a device as used by the framework
* @pdata: Platform data with device connections associated to this device.
--
2.34.1
next prev parent reply other threads:[~2024-06-11 15:03 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-11 15:02 [PATCH v3 00/14] coresight: Use per-sink trace ID maps for Perf sessions James Clark
2024-06-11 15:02 ` [PATCH v3 01/14] perf: cs-etm: Create decoders after both AUX and HW_ID search passes James Clark
2024-06-11 15:02 ` [PATCH v3 02/14] perf: cs-etm: Allocate queues for all CPUs James Clark
2024-06-11 15:02 ` [PATCH v3 03/14] perf: cs-etm: Move traceid_list to each queue James Clark
2024-06-11 15:02 ` [PATCH v3 04/14] perf: cs-etm: Create decoders based on the trace ID mappings James Clark
2024-06-11 15:02 ` [PATCH v3 05/14] perf: cs-etm: Support version 0.1 of HW_ID packets James Clark
2024-06-11 15:02 ` [PATCH v3 06/14] coresight: Remove unused ETM Perf stubs James Clark
2024-06-11 15:02 ` [PATCH v3 07/14] coresight: Clarify comments around the PID of the sink owner James Clark
2024-06-11 15:02 ` James Clark [this message]
2024-06-11 15:02 ` [PATCH v3 09/14] coresight: Expose map arguments in trace ID API James Clark
2024-06-11 15:02 ` [PATCH v3 10/14] coresight: Make CPU id map a property of a trace ID map James Clark
2024-06-11 15:02 ` [PATCH v3 11/14] coresight: Use per-sink trace ID maps for Perf sessions James Clark
2024-06-11 15:02 ` [PATCH v3 12/14] coresight: Remove pending trace ID release mechanism James Clark
2024-06-11 15:02 ` [PATCH v3 13/14] coresight: Emit sink ID in the HW_ID packets James Clark
2024-06-11 15:02 ` [PATCH v3 14/14] coresight: Make trace ID map spinlock local to the map James Clark
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