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From: Athira Rajeev <atrajeev@linux.vnet.ibm.com>
To: acme@kernel.org, jolsa@kernel.org, adrian.hunter@intel.com,
	irogers@google.com, namhyung@kernel.org,
	segher@kernel.crashing.org, christophe.leroy@csgroup.eu
Cc: linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org,
	linuxppc-dev@lists.ozlabs.org, akanksha@linux.ibm.com,
	maddy@linux.ibm.com, atrajeev@linux.vnet.ibm.com,
	kjain@linux.ibm.com, disgoel@linux.vnet.ibm.com
Subject: [V4 10/16] tools/perf: Update instruction tracking for powerpc
Date: Fri, 14 Jun 2024 22:56:25 +0530	[thread overview]
Message-ID: <20240614172631.56803-11-atrajeev@linux.vnet.ibm.com> (raw)
In-Reply-To: <20240614172631.56803-1-atrajeev@linux.vnet.ibm.com>

Add instruction tracking function "update_insn_state_powerpc" for
powerpc. Example sequence in powerpc:

ld      r10,264(r3)
mr      r31,r3
<<after some sequence>
ld      r9,312(r31)

Consider ithe sample is pointing to: "ld r9,312(r31)".
Here the memory reference is hit at "312(r31)" where 312 is the offset
and r31 is the source register. Previous instruction sequence shows that
register state of r3 is moved to r31. So to identify the data type for r31
access, the previous instruction ("mr") needs to be tracked and the
state type entry has to be updated. Current instruction tracking support
in perf tools infrastructure is specific to x86. Patch adds this support
for powerpc as well.

Signed-off-by: Athira Rajeev <atrajeev@linux.vnet.ibm.com>
---
 .../perf/arch/powerpc/annotate/instructions.c | 65 +++++++++++++++++++
 tools/perf/util/annotate-data.c               |  9 ++-
 tools/perf/util/disasm.c                      |  1 +
 3 files changed, 74 insertions(+), 1 deletion(-)

diff --git a/tools/perf/arch/powerpc/annotate/instructions.c b/tools/perf/arch/powerpc/annotate/instructions.c
index db72148eb857..13eaec36a9dc 100644
--- a/tools/perf/arch/powerpc/annotate/instructions.c
+++ b/tools/perf/arch/powerpc/annotate/instructions.c
@@ -231,6 +231,71 @@ static struct ins_ops *check_ppc_insn(int raw_insn)
 	return NULL;
 }
 
+/*
+ * Instruction tracking function to track register state moves.
+ * Example sequence:
+ *    ld      r10,264(r3)
+ *    mr      r31,r3
+ *    <<after some sequence>
+ *    ld      r9,312(r31)
+ *
+ * Previous instruction sequence shows that register state of r3
+ * is moved to r31. update_insn_state_powerpc tracks these state
+ * changes
+ */
+#ifdef HAVE_DWARF_SUPPORT
+static void update_insn_state_powerpc(struct type_state *state,
+		struct data_loc_info *dloc, Dwarf_Die * cu_die __maybe_unused,
+		struct disasm_line *dl)
+{
+	struct annotated_insn_loc loc;
+	struct annotated_op_loc *src = &loc.ops[INSN_OP_SOURCE];
+	struct annotated_op_loc *dst = &loc.ops[INSN_OP_TARGET];
+	struct type_state_reg *tsr;
+	u32 insn_offset = dl->al.offset;
+
+	if (annotate_get_insn_location(dloc->arch, dl, &loc) < 0)
+		return;
+
+	/*
+	 * Value 444 for bits 21:30 is for "mr"
+	 * instruction. "mr" is extended OR. So set the
+	 * source and destination reg correctly
+	 */
+	if (PPC_21_30(dl->raw.raw_insn) == 444) {
+		int src_reg = src->reg1;
+
+		src->reg1 = dst->reg1;
+		dst->reg1 = src_reg;
+	}
+
+	if (!has_reg_type(state, dst->reg1))
+		return;
+
+	tsr = &state->regs[dst->reg1];
+
+	if (!has_reg_type(state, src->reg1) ||
+			!state->regs[src->reg1].ok) {
+		tsr->ok = false;
+		return;
+	}
+
+	tsr->type = state->regs[src->reg1].type;
+	tsr->kind = state->regs[src->reg1].kind;
+	tsr->ok = true;
+
+	pr_debug_dtp("mov [%x] reg%d -> reg%d",
+			insn_offset, src->reg1, dst->reg1);
+	pr_debug_type_name(&tsr->type, tsr->kind);
+}
+#else /* HAVE_DWARF_SUPPORT */
+static void update_insn_state_powerpc(struct type_state *state __maybe_unused, struct data_loc_info *dloc __maybe_unused,
+		Dwarf_Die * cu_die __maybe_unused, struct disasm_line *dl __maybe_unused)
+{
+	return;
+}
+#endif /* HAVE_DWARF_SUPPORT */
+
 static int powerpc__annotate_init(struct arch *arch, char *cpuid __maybe_unused)
 {
 	if (!arch->initialized) {
diff --git a/tools/perf/util/annotate-data.c b/tools/perf/util/annotate-data.c
index 7a48c3d72b89..734acdd8c4b7 100644
--- a/tools/perf/util/annotate-data.c
+++ b/tools/perf/util/annotate-data.c
@@ -1080,6 +1080,13 @@ static int find_data_type_insn(struct data_loc_info *dloc,
 	return ret;
 }
 
+static int arch_supports_insn_tracking(struct data_loc_info *dloc)
+{
+	if ((arch__is(dloc->arch, "x86")) || (arch__is(dloc->arch, "powerpc")))
+		return 1;
+	return 0;
+}
+
 /*
  * Construct a list of basic blocks for each scope with variables and try to find
  * the data type by updating a type state table through instructions.
@@ -1094,7 +1101,7 @@ static int find_data_type_block(struct data_loc_info *dloc,
 	int ret = -1;
 
 	/* TODO: other architecture support */
-	if (!arch__is(dloc->arch, "x86"))
+	if (!arch_supports_insn_tracking(dloc))
 		return -1;
 
 	prev_dst_ip = dst_ip = dloc->ip;
diff --git a/tools/perf/util/disasm.c b/tools/perf/util/disasm.c
index 2191a3ec6517..86ff98e64890 100644
--- a/tools/perf/util/disasm.c
+++ b/tools/perf/util/disasm.c
@@ -155,6 +155,7 @@ static struct arch architectures[] = {
 	{
 		.name = "powerpc",
 		.init = powerpc__annotate_init,
+		.update_insn_state = update_insn_state_powerpc,
 	},
 	{
 		.name = "riscv64",
-- 
2.43.0


  parent reply	other threads:[~2024-06-14 17:27 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-06-14 17:26 [V4 00/16] Add data type profiling support for powerpc Athira Rajeev
2024-06-14 17:26 ` [V4 01/16] tools/perf: Move the data structures related to register type to header file Athira Rajeev
2024-06-25  5:15   ` Namhyung Kim
2024-06-25 10:54     ` Athira Rajeev
2024-06-14 17:26 ` [V4 02/16] tools/perf: Add "update_insn_state" callback function to handle arch specific instruction tracking Athira Rajeev
2024-06-14 17:26 ` [V4 03/16] tools/perf: Add support to capture and parse raw instruction in powerpc using dso__data_read_offset utility Athira Rajeev
2024-06-25  5:29   ` Namhyung Kim
2024-06-25 12:38     ` Athira Rajeev
2024-06-25 18:39       ` Namhyung Kim
2024-06-26  4:09         ` Athira Rajeev
2024-06-14 17:26 ` [V4 04/16] tools/perf: Use sort keys to determine whether to pick objdump to disassemble Athira Rajeev
2024-06-25  5:32   ` Namhyung Kim
2024-06-14 17:26 ` [V4 05/16] tools/perf: Add disasm_line__parse to parse raw instruction for powerpc Athira Rajeev
2024-06-25  5:39   ` Namhyung Kim
2024-06-25 12:42     ` Athira Rajeev
2024-06-25 18:45       ` Namhyung Kim
2024-06-26  4:08         ` Athira Rajeev
2024-06-26 21:17           ` Namhyung Kim
2024-06-27  9:28             ` Athira Rajeev
2024-06-30 11:10             ` Athira Rajeev
2024-06-14 17:26 ` [V4 06/16] tools/perf: Update parameters for reg extract functions to use raw instruction on powerpc Athira Rajeev
2024-06-25  6:00   ` Namhyung Kim
2024-06-25 12:43     ` Athira Rajeev
2024-06-14 17:26 ` [V4 07/16] tools/perf: Add support to identify memory instructions of opcode 31 in powerpc Athira Rajeev
2024-06-14 17:26 ` [V4 08/16] tools/perf: Add some of the arithmetic instructions to support instruction tracking " Athira Rajeev
2024-06-14 17:26 ` [V4 09/16] tools/perf: Add more instructions for instruction tracking Athira Rajeev
2024-06-14 17:26 ` Athira Rajeev [this message]
2024-06-14 17:26 ` [V4 11/16] tools/perf: Make capstone_init non-static so that it can be used during symbol disassemble Athira Rajeev
2024-06-14 17:26 ` [V4 12/16] tools/perf: Use capstone_init and remove open_capstone_handle from disasm.c Athira Rajeev
2024-06-14 17:26 ` [V4 13/16] tools/perf: Add support to use libcapstone in powerpc Athira Rajeev
2024-06-25  6:08   ` Namhyung Kim
2024-06-25 12:44     ` Athira Rajeev
2024-06-14 17:26 ` [V4 14/16] tools/perf: Add support to find global register variables using find_data_type_global_reg Athira Rajeev
2024-06-25  6:17   ` Namhyung Kim
2024-06-25 12:45     ` Athira Rajeev
2024-06-14 17:26 ` [V4 15/16] tools/perf: Add support for global_die to capture name of variable in case of register defined variable Athira Rajeev
2024-06-14 17:26 ` [V4 16/16] tools/perf: Set instruction name to be used with insn-stat when using raw instruction Athira Rajeev
2024-06-20 15:31 ` [V4 00/16] Add data type profiling support for powerpc Athira Rajeev
2024-06-22  0:06   ` Namhyung Kim
2024-06-25 11:48     ` Athira Rajeev

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