From: Athira Rajeev <atrajeev@linux.vnet.ibm.com>
To: acme@kernel.org, jolsa@kernel.org, adrian.hunter@intel.com,
irogers@google.com, namhyung@kernel.org,
segher@kernel.crashing.org, christophe.leroy@csgroup.eu
Cc: linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org,
linuxppc-dev@lists.ozlabs.org, akanksha@linux.ibm.com,
maddy@linux.ibm.com, atrajeev@linux.vnet.ibm.com,
kjain@linux.ibm.com, disgoel@linux.vnet.ibm.com
Subject: [PATCH V6 07/18] tools/perf: Add parse function for memory instructions in powerpc
Date: Sun, 7 Jul 2024 20:14:08 +0530 [thread overview]
Message-ID: <20240707144419.92510-8-atrajeev@linux.vnet.ibm.com> (raw)
In-Reply-To: <20240707144419.92510-1-atrajeev@linux.vnet.ibm.com>
Use the raw instruction code and macros to identify memory instructions,
extract register fields and also offset. The implementation addresses
the D-form, X-form, DS-form instructions. Two main functions are added.
New parse function "load_store__parse" as instruction ops parser for
memory instructions. Unlink other parser (like mov__parse), this parser
fills in the "multi_regs" field for source/target and new added "mem_ref"
field. No other fields are set because, here there is no need to parse the
disassembled code and arch specific macros will take care of extracting
offset and regs which is easier and will be precise.
In powerpc, all instructions with a primary opcode from 32 to 63
are memory instructions. Update "ins__find" function to have "raw_insn"
also as a parameter.
Signed-off-by: Athira Rajeev<atrajeev@linux.vnet.ibm.com>
---
.../perf/arch/powerpc/annotate/instructions.c | 16 ++++++
tools/perf/util/disasm.c | 54 +++++++++++++++++--
tools/perf/util/disasm.h | 2 +-
3 files changed, 66 insertions(+), 6 deletions(-)
diff --git a/tools/perf/arch/powerpc/annotate/instructions.c b/tools/perf/arch/powerpc/annotate/instructions.c
index d57fd023ef9c..b084423d8477 100644
--- a/tools/perf/arch/powerpc/annotate/instructions.c
+++ b/tools/perf/arch/powerpc/annotate/instructions.c
@@ -49,6 +49,22 @@ static struct ins_ops *powerpc__associate_instruction_ops(struct arch *arch, con
return ops;
}
+#define PPC_OP(op) (((op) >> 26) & 0x3F)
+
+static struct ins_ops *check_ppc_insn(u32 raw_insn)
+{
+ int opcode = PPC_OP(raw_insn);
+
+ /*
+ * Instructions with opcode 32 to 63 are memory
+ * instructions in powerpc
+ */
+ if ((opcode & 0x20))
+ return &load_store_ops;
+
+ return NULL;
+}
+
static int powerpc__annotate_init(struct arch *arch, char *cpuid __maybe_unused)
{
if (!arch->initialized) {
diff --git a/tools/perf/util/disasm.c b/tools/perf/util/disasm.c
index 8e45f0874e03..b30277a930c0 100644
--- a/tools/perf/util/disasm.c
+++ b/tools/perf/util/disasm.c
@@ -37,6 +37,7 @@ static struct ins_ops mov_ops;
static struct ins_ops nop_ops;
static struct ins_ops lock_ops;
static struct ins_ops ret_ops;
+static struct ins_ops load_store_ops;
static int jump__scnprintf(struct ins *ins, char *bf, size_t size,
struct ins_operands *ops, int max_ins_name);
@@ -522,7 +523,7 @@ static int lock__parse(struct arch *arch, struct ins_operands *ops, struct map_s
if (disasm_line__parse(ops->raw, &ops->locked.ins.name, &ops->locked.ops->raw) < 0)
goto out_free_ops;
- ops->locked.ins.ops = ins__find(arch, ops->locked.ins.name);
+ ops->locked.ins.ops = ins__find(arch, ops->locked.ins.name, 0);
if (ops->locked.ins.ops == NULL)
goto out_free_ops;
@@ -678,6 +679,37 @@ static struct ins_ops mov_ops = {
.scnprintf = mov__scnprintf,
};
+static int load_store__scnprintf(struct ins *ins, char *bf, size_t size,
+ struct ins_operands *ops, int max_ins_name)
+{
+ return scnprintf(bf, size, "%-*s %s", max_ins_name, ins->name,
+ ops->raw);
+}
+
+/*
+ * Sets the fields: multi_regs and "mem_ref".
+ * "mem_ref" is set for ops->source which is later used to
+ * fill the objdump->memory_ref-char field. This ops is currently
+ * used by powerpc and since binary instruction code is used to
+ * extract opcode, regs and offset, no other parsing is needed here
+ */
+static int load_store__parse(struct arch *arch __maybe_unused, struct ins_operands *ops,
+ struct map_symbol *ms __maybe_unused, struct disasm_line *dl __maybe_unused)
+{
+ ops->source.mem_ref = true;
+ ops->source.multi_regs = false;
+
+ ops->target.mem_ref = false;
+ ops->target.multi_regs = false;
+
+ return 0;
+}
+
+static struct ins_ops load_store_ops = {
+ .parse = load_store__parse,
+ .scnprintf = load_store__scnprintf,
+};
+
static int dec__parse(struct arch *arch __maybe_unused, struct ins_operands *ops, struct map_symbol *ms __maybe_unused,
struct disasm_line *dl __maybe_unused)
{
@@ -769,11 +801,23 @@ static void ins__sort(struct arch *arch)
qsort(arch->instructions, nmemb, sizeof(struct ins), ins__cmp);
}
-static struct ins_ops *__ins__find(struct arch *arch, const char *name)
+static struct ins_ops *__ins__find(struct arch *arch, const char *name, u32 raw_insn)
{
struct ins *ins;
const int nmemb = arch->nr_instructions;
+ if (arch__is(arch, "powerpc")) {
+ /*
+ * For powerpc, identify the instruction ops
+ * from the opcode using raw_insn.
+ */
+ struct ins_ops *ops;
+
+ ops = check_ppc_insn(raw_insn);
+ if (ops)
+ return ops;
+ }
+
if (!arch->sorted_instructions) {
ins__sort(arch);
arch->sorted_instructions = true;
@@ -803,9 +847,9 @@ static struct ins_ops *__ins__find(struct arch *arch, const char *name)
return ins ? ins->ops : NULL;
}
-struct ins_ops *ins__find(struct arch *arch, const char *name)
+struct ins_ops *ins__find(struct arch *arch, const char *name, u32 raw_insn)
{
- struct ins_ops *ops = __ins__find(arch, name);
+ struct ins_ops *ops = __ins__find(arch, name, raw_insn);
if (!ops && arch->associate_instruction_ops)
ops = arch->associate_instruction_ops(arch, name);
@@ -815,7 +859,7 @@ struct ins_ops *ins__find(struct arch *arch, const char *name)
static void disasm_line__init_ins(struct disasm_line *dl, struct arch *arch, struct map_symbol *ms)
{
- dl->ins.ops = ins__find(arch, dl->ins.name);
+ dl->ins.ops = ins__find(arch, dl->ins.name, dl->raw.raw_insn);
if (!dl->ins.ops)
return;
diff --git a/tools/perf/util/disasm.h b/tools/perf/util/disasm.h
index 30be0a94ea04..c1bb1e484bfb 100644
--- a/tools/perf/util/disasm.h
+++ b/tools/perf/util/disasm.h
@@ -105,7 +105,7 @@ struct annotate_args {
struct arch *arch__find(const char *name);
bool arch__is(struct arch *arch, const char *name);
-struct ins_ops *ins__find(struct arch *arch, const char *name);
+struct ins_ops *ins__find(struct arch *arch, const char *name, u32 raw_insn);
int ins__scnprintf(struct ins *ins, char *bf, size_t size,
struct ins_operands *ops, int max_ins_name);
--
2.43.0
next prev parent reply other threads:[~2024-07-07 14:45 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-07 14:44 [PATCH V6 00/18] Add data type profiling support for powerpc Athira Rajeev
2024-07-07 14:44 ` [PATCH V6 01/18] tools/perf: Move the data structures related to register type to header file Athira Rajeev
2024-07-07 14:44 ` [PATCH V6 02/18] tools/perf: Add "update_insn_state" callback function to handle arch specific instruction tracking Athira Rajeev
2024-07-07 14:44 ` [PATCH V6 03/18] tools/perf: Update TYPE_STATE_MAX_REGS to include max of regs in powerpc Athira Rajeev
2024-07-07 14:44 ` [PATCH V6 04/18] tools/perf: Add disasm_line__parse to parse raw instruction for powerpc Athira Rajeev
2024-07-07 14:44 ` [PATCH V6 05/18] tools/perf: Add support to capture and parse raw instruction in powerpc using dso__data_read_offset utility Athira Rajeev
2024-07-07 14:44 ` [PATCH V6 06/18] tools/perf: Update parameters for reg extract functions to use raw instruction on powerpc Athira Rajeev
2024-07-07 14:44 ` Athira Rajeev [this message]
2024-07-07 14:44 ` [PATCH V6 08/18] tools/perf: Add support to identify memory instructions of opcode 31 in powerpc Athira Rajeev
2024-07-07 14:44 ` [PATCH V6 09/18] tools/perf: Add some of the arithmetic instructions to support instruction tracking " Athira Rajeev
2024-07-07 14:44 ` [PATCH V6 10/18] tools/perf: Add more instructions for instruction tracking Athira Rajeev
2024-07-07 14:44 ` [PATCH V6 11/18] tools/perf: Update instruction tracking for powerpc Athira Rajeev
2024-07-07 14:44 ` [PATCH V6 12/18] tools/perf: Make capstone_init non-static so that it can be used during symbol disassemble Athira Rajeev
2024-07-07 14:44 ` [PATCH V6 13/18] tools/perf: Use capstone_init and remove open_capstone_handle from disasm.c Athira Rajeev
2024-07-07 14:44 ` [PATCH V6 14/18] tools/perf: Add support to use libcapstone in powerpc Athira Rajeev
2024-07-07 14:44 ` [PATCH V6 15/18] tools/perf: Add support to find global register variables using find_data_type_global_reg Athira Rajeev
2024-07-07 14:44 ` [PATCH V6 16/18] tools/perf: Add support for global_die to capture name of variable in case of register defined variable Athira Rajeev
2024-07-07 14:44 ` [PATCH V6 17/18] tools/perf: Update data_type_cmp and sort__typeoff_sort function to include var_name in comparison Athira Rajeev
2024-07-12 21:25 ` Namhyung Kim
2024-07-13 6:22 ` Athira Rajeev
2024-07-13 14:55 ` Namhyung Kim
2024-07-13 17:21 ` Athira Rajeev
2024-07-07 14:44 ` [PATCH V6 18/18] tools/perf: Set instruction name to be used with insn-stat when using raw instruction Athira Rajeev
2024-07-12 21:27 ` Namhyung Kim
2024-07-13 6:01 ` Athira Rajeev
2024-07-12 3:44 ` [PATCH V6 00/18] Add data type profiling support for powerpc Athira Rajeev
2024-07-12 3:48 ` Namhyung Kim
2024-07-12 16:33 ` kajoljain
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