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From: Sohil Mehta <sohil.mehta@intel.com>
To: x86@kernel.org, Dave Hansen <dave.hansen@linux.intel.com>,
	Tony Luck <tony.luck@intel.com>
Cc: Peter Zijlstra <peterz@infradead.org>,
	Ingo Molnar <mingo@redhat.com>,
	Arnaldo Carvalho de Melo <acme@kernel.org>,
	Namhyung Kim <namhyung@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Jiri Olsa <jolsa@kernel.org>, Ian Rogers <irogers@google.com>,
	Adrian Hunter <adrian.hunter@intel.com>,
	Kan Liang <kan.liang@linux.intel.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Borislav Petkov <bp@alien8.de>, "H . Peter Anvin" <hpa@zytor.com>,
	"Rafael J . Wysocki" <rafael@kernel.org>,
	Len Brown <lenb@kernel.org>, Andy Lutomirski <luto@kernel.org>,
	Viresh Kumar <viresh.kumar@linaro.org>,
	Jean Delvare <jdelvare@suse.com>,
	Guenter Roeck <linux@roeck-us.net>,
	Zhang Rui <rui.zhang@intel.com>,
	Andrew Cooper <andrew.cooper3@citrix.com>,
	David Laight <david.laight.linux@gmail.com>,
	Dapeng Mi <dapeng1.mi@linux.intel.com>,
	Sohil Mehta <sohil.mehta@intel.com>,
	linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-acpi@vger.kernel.org, linux-pm@vger.kernel.org
Subject: [PATCH v3 06/15] x86/cpu/intel: Replace Family 15 checks with VFM ones
Date: Wed, 19 Feb 2025 18:41:24 +0000	[thread overview]
Message-ID: <20250219184133.816753-7-sohil.mehta@intel.com> (raw)
In-Reply-To: <20250219184133.816753-1-sohil.mehta@intel.com>

Introduce names for some old pentium 4 models and replace the x86_model
checks with VFM ones.

Signed-off-by: Sohil Mehta <sohil.mehta@intel.com>
Acked-by: Dave Hansen <dave.hansen@linux.intel.com>
---
v3: Picked up Dave's Ack.
v2: No change.
---
 arch/x86/include/asm/intel-family.h | 4 ++++
 arch/x86/kernel/cpu/intel.c         | 6 +++---
 2 files changed, 7 insertions(+), 3 deletions(-)

diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h
index c1a081585fcb..f509061b8c7e 100644
--- a/arch/x86/include/asm/intel-family.h
+++ b/arch/x86/include/asm/intel-family.h
@@ -184,6 +184,10 @@
 /* Family 5 */
 #define INTEL_QUARK_X1000		IFM(5, 0x09) /* Quark X1000 SoC */
 
+/* Family 15 - NetBurst */
+#define INTEL_P4_WILLAMETTE		IFM(15, 0x01) /* Also Xeon Foster */
+#define INTEL_P4_PRESCOTT		IFM(15, 0x03)
+
 /* Family 19 */
 #define INTEL_PANTHERCOVE_X		IFM(19, 0x01) /* Diamond Rapids */
 
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 8e67d1ef4c73..30f3812ba62c 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -256,8 +256,8 @@ static void early_init_intel(struct cpuinfo_x86 *c)
 #endif
 
 	/* CPUID workaround for 0F33/0F34 CPU */
-	if (c->x86 == 0xF && c->x86_model == 0x3
-	    && (c->x86_stepping == 0x3 || c->x86_stepping == 0x4))
+	if (c->x86_vfm == INTEL_P4_PRESCOTT &&
+	    (c->x86_stepping == 0x3 || c->x86_stepping == 0x4))
 		c->x86_phys_bits = 36;
 
 	/*
@@ -430,7 +430,7 @@ static void intel_workarounds(struct cpuinfo_x86 *c)
 	 * P4 Xeon erratum 037 workaround.
 	 * Hardware prefetcher may cause stale data to be loaded into the cache.
 	 */
-	if ((c->x86 == 15) && (c->x86_model == 1) && (c->x86_stepping == 1)) {
+	if (c->x86_vfm == INTEL_P4_WILLAMETTE && c->x86_stepping == 1) {
 		if (msr_set_bit(MSR_IA32_MISC_ENABLE,
 				MSR_IA32_MISC_ENABLE_PREFETCH_DISABLE_BIT) > 0) {
 			pr_info("CPU: C0 stepping P4 Xeon detected.\n");
-- 
2.43.0


  parent reply	other threads:[~2025-02-19 19:29 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-02-19 18:41 [PATCH v3 00/15] Prepare for new Intel Family numbers Sohil Mehta
2025-02-19 18:41 ` [PATCH v3 01/15] x86/apic: Fix 32-bit APIC initialization for extended Intel Families Sohil Mehta
2025-02-19 18:41 ` [PATCH v3 02/15] x86/cpu/intel: Fix the movsl alignment preference for extended Families Sohil Mehta
2025-02-19 18:41 ` [PATCH v3 03/15] x86/microcode: Update the Intel processor flag scan check Sohil Mehta
2025-02-19 18:41 ` [PATCH v3 04/15] x86/mtrr: Modify a x86_model check to an Intel VFM check Sohil Mehta
2025-02-19 18:41 ` [PATCH v3 05/15] x86/cpu/intel: Replace early Family 6 checks with VFM ones Sohil Mehta
2025-02-19 18:41 ` Sohil Mehta [this message]
2025-02-19 18:41 ` [PATCH v3 07/15] x86/cpu/intel: Replace Family 5 model " Sohil Mehta
2025-02-19 18:41 ` [PATCH v3 08/15] x86/acpi/cstate: Improve Intel Family model checks Sohil Mehta
2025-02-20 19:20   ` Rafael J. Wysocki
2025-02-19 18:41 ` [PATCH v3 09/15] x86/smpboot: Remove confusing quirk usage in INIT delay Sohil Mehta
2025-02-19 18:41 ` [PATCH v3 10/15] x86/smpboot: Fix INIT delay assignment for extended Intel Families Sohil Mehta
2025-02-19 18:41 ` [PATCH v3 11/15] x86/cpu/intel: Fix fast string initialization for extended Families Sohil Mehta
2025-02-19 18:41 ` [PATCH v3 12/15] x86/pat: Replace Intel x86_model checks with VFM ones Sohil Mehta
2025-02-19 18:41 ` [PATCH v3 13/15] x86/cpu/intel: Bound the non-architectural constant_tsc model checks Sohil Mehta
2025-08-21 13:15   ` David Woodhouse
2025-08-21 19:34     ` Sohil Mehta
2025-08-21 19:43       ` Sohil Mehta
2025-08-21 20:09         ` David Woodhouse
2025-08-22  1:46         ` Xiaoyao Li
2025-08-24 22:39           ` Demi Marie Obenour
2025-02-19 18:41 ` [PATCH v3 14/15] perf/x86: Simplify Intel PMU initialization Sohil Mehta
2025-02-19 20:10   ` Liang, Kan
2025-02-19 20:31     ` Sohil Mehta
2025-02-19 20:45       ` Liang, Kan
2025-02-27  0:16   ` [PATCH v3.1 " Sohil Mehta
2025-02-19 18:41 ` [PATCH v3 15/15] perf/x86/p4: Replace Pentium 4 model checks with VFM ones Sohil Mehta
2025-02-19 20:11   ` Liang, Kan
2025-03-17 17:09 ` [PATCH v3 00/15] Prepare for new Intel Family numbers Sohil Mehta
2025-03-18 18:35   ` Ingo Molnar
2025-03-18 19:10     ` Sohil Mehta
2025-03-18 20:13       ` Ingo Molnar
2025-03-19 15:53         ` Sohil Mehta
2025-03-19 19:46           ` Ingo Molnar

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