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[209.17.68.221]) by smtp.gmail.com with UTF8SMTPSA id d9443c01a7336-223504c5cc6sm88516415ad.112.2025.03.03.22.44.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 03 Mar 2025 22:44:54 -0800 (PST) Date: Tue, 4 Mar 2025 15:44:52 +0900 From: Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= To: Fan Ni Cc: Shradha Todi , linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-perf-users@vger.kernel.org, manivannan.sadhasivam@linaro.org, lpieralisi@kernel.org, robh@kernel.org, bhelgaas@google.com, jingoohan1@gmail.com, Jonathan.Cameron@huawei.com, a.manzanares@samsung.com, pankaj.dubey@samsung.com, cassel@kernel.org, 18255117159@163.com, xueshuai@linux.alibaba.com, renyu.zj@linux.alibaba.com, will@kernel.org, mark.rutland@arm.com Subject: Re: [PATCH v7 3/5] Add debugfs based silicon debug support in DWC Message-ID: <20250304064452.GA2615015@rocinante> References: <20250221131548.59616-1-shradha.t@samsung.com> <20250221131548.59616-4-shradha.t@samsung.com> <20250303194647.GC1552306@rocinante> Precedence: bulk X-Mailing-List: linux-perf-users@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Hello, [...] > > > What will happen if ret != 0? still return 0? > > > > Given that callers of dwc_pcie_debugfs_init() check for errors, > > this probably should correctly bubble up any failure coming from > > dwc_pcie_rasdes_debugfs_init(). > > > > I made updates to the code directly on the current branch, have a look: > > > > https://web.git.kernel.org/pub/scm/linux/kernel/git/pci/pci.git/commit/?h=controller/dwc&id=1ff54f4cbaed9ec6994844967c36cf7ada4cbe5e > > > > Let me know if this is OK with you. > > It looks good to me. > > Feel free to add, > Reviewed-by: Fan Ni Will do. Thank you. Krzysztof