From: Sohil Mehta <sohil.mehta@intel.com>
To: x86@kernel.org, linux-kernel@vger.kernel.org
Cc: Xin Li <xin@zytor.com>, "H . Peter Anvin" <hpa@zytor.com>,
Andy Lutomirski <luto@kernel.org>,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
Dave Hansen <dave.hansen@linux.intel.com>,
Peter Zijlstra <peterz@infradead.org>,
Sean Christopherson <seanjc@google.com>,
Adrian Hunter <adrian.hunter@intel.com>,
Kan Liang <kan.liang@linux.intel.com>,
Tony Luck <tony.luck@intel.com>, Zhang Rui <rui.zhang@intel.com>,
Steven Rostedt <rostedt@goodmis.org>,
Sohil Mehta <sohil.mehta@intel.com>,
Andrew Cooper <andrew.cooper3@citrix.com>,
"Kirill A . Shutemov" <kirill.shutemov@linux.intel.com>,
Jacob Pan <jacob.pan@linux.microsoft.com>,
Andi Kleen <ak@linux.intel.com>, Kai Huang <kai.huang@intel.com>,
Sandipan Das <sandipan.das@amd.com>,
linux-perf-users@vger.kernel.org, linux-edac@vger.kernel.org,
kvm@vger.kernel.org, linux-pm@vger.kernel.org,
linux-trace-kernel@vger.kernel.org
Subject: [PATCH v7 08/10] x86/nmi: Enable NMI-source for IPIs delivered as NMIs
Date: Thu, 12 Jun 2025 14:48:47 -0700 [thread overview]
Message-ID: <20250612214849.3950094-9-sohil.mehta@intel.com> (raw)
In-Reply-To: <20250612214849.3950094-1-sohil.mehta@intel.com>
With the IPI handling APIs ready to support the new NMI encoding, encode
the NMI delivery mode directly with the NMI-source vectors to trigger
NMIs.
Move most of the existing NMI-based IPIs to use the new NMI-source
vectors, except for the microcode rendezvous NMI and the crash reboot
NMI. NMI handling for them is special-cased in exc_nmi() and does not
need NMI-source reporting.
However, in the future, it might be useful to assign a source vector to
all NMI sources to improve isolation and debuggability.
Originally-by: Jacob Pan <jacob.jun.pan@linux.intel.com>
Suggested-by: Sean Christopherson <seanjc@google.com>
Co-developed-by: Xin Li (Intel) <xin@zytor.com>
Signed-off-by: Xin Li (Intel) <xin@zytor.com>
Signed-off-by: Sohil Mehta <sohil.mehta@intel.com>
---
v7: No change.
v6: Include asm/nmi.h to avoid compile errors. (LKP)
v5: Encode APIC_DM_NMI directly with the NMI-source vector.
---
arch/x86/include/asm/apic.h | 8 ++++++++
arch/x86/kernel/apic/hw_nmi.c | 2 +-
arch/x86/kernel/cpu/mce/inject.c | 2 +-
arch/x86/kernel/kgdb.c | 2 +-
arch/x86/kernel/nmi_selftest.c | 2 +-
arch/x86/kernel/smp.c | 2 +-
6 files changed, 13 insertions(+), 5 deletions(-)
diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h
index 32cdd81e5e45..5789df1708bd 100644
--- a/arch/x86/include/asm/apic.h
+++ b/arch/x86/include/asm/apic.h
@@ -14,6 +14,7 @@
#include <asm/msr.h>
#include <asm/hardirq.h>
#include <asm/io.h>
+#include <asm/nmi.h>
#include <asm/posted_intr.h>
#define ARCH_APICTIMER_STOPS_ON_C3 1
@@ -23,6 +24,13 @@
#define APIC_EXTNMI_ALL 1
#define APIC_EXTNMI_NONE 2
+/* Trigger NMIs with source information */
+#define TEST_NMI (APIC_DM_NMI | NMIS_VECTOR_TEST)
+#define SMP_STOP_NMI (APIC_DM_NMI | NMIS_VECTOR_SMP_STOP)
+#define BT_NMI (APIC_DM_NMI | NMIS_VECTOR_BT)
+#define KGDB_NMI (APIC_DM_NMI | NMIS_VECTOR_KGDB)
+#define MCE_NMI (APIC_DM_NMI | NMIS_VECTOR_MCE)
+
/*
* Debugging macros
*/
diff --git a/arch/x86/kernel/apic/hw_nmi.c b/arch/x86/kernel/apic/hw_nmi.c
index 4e04f13d2de9..586f4b25feae 100644
--- a/arch/x86/kernel/apic/hw_nmi.c
+++ b/arch/x86/kernel/apic/hw_nmi.c
@@ -33,7 +33,7 @@ u64 hw_nmi_get_sample_period(int watchdog_thresh)
#ifdef arch_trigger_cpumask_backtrace
static void nmi_raise_cpu_backtrace(cpumask_t *mask)
{
- __apic_send_IPI_mask(mask, NMI_VECTOR);
+ __apic_send_IPI_mask(mask, BT_NMI);
}
void arch_trigger_cpumask_backtrace(const cpumask_t *mask, int exclude_cpu)
diff --git a/arch/x86/kernel/cpu/mce/inject.c b/arch/x86/kernel/cpu/mce/inject.c
index 320068e01c22..81a04836ac74 100644
--- a/arch/x86/kernel/cpu/mce/inject.c
+++ b/arch/x86/kernel/cpu/mce/inject.c
@@ -270,7 +270,7 @@ static void __maybe_unused raise_mce(struct mce *m)
mce_irq_ipi, NULL, 0);
preempt_enable();
} else if (m->inject_flags & MCJ_NMI_BROADCAST)
- __apic_send_IPI_mask(mce_inject_cpumask, NMI_VECTOR);
+ __apic_send_IPI_mask(mce_inject_cpumask, MCE_NMI);
}
start = jiffies;
while (!cpumask_empty(mce_inject_cpumask)) {
diff --git a/arch/x86/kernel/kgdb.c b/arch/x86/kernel/kgdb.c
index dfde434d2992..013feeb6a9ef 100644
--- a/arch/x86/kernel/kgdb.c
+++ b/arch/x86/kernel/kgdb.c
@@ -416,7 +416,7 @@ static void kgdb_disable_hw_debug(struct pt_regs *regs)
*/
void kgdb_roundup_cpus(void)
{
- apic_send_IPI_allbutself(NMI_VECTOR);
+ apic_send_IPI_allbutself(KGDB_NMI);
}
#endif
diff --git a/arch/x86/kernel/nmi_selftest.c b/arch/x86/kernel/nmi_selftest.c
index f3918888e494..d5578370b47f 100644
--- a/arch/x86/kernel/nmi_selftest.c
+++ b/arch/x86/kernel/nmi_selftest.c
@@ -72,7 +72,7 @@ static void __init test_nmi_ipi(struct cpumask *mask)
/* sync above data before sending NMI */
wmb();
- __apic_send_IPI_mask(mask, NMI_VECTOR);
+ __apic_send_IPI_mask(mask, TEST_NMI);
/* Don't wait longer than a second */
timeout = USEC_PER_SEC;
diff --git a/arch/x86/kernel/smp.c b/arch/x86/kernel/smp.c
index 1ed065b78467..239e9bf97abb 100644
--- a/arch/x86/kernel/smp.c
+++ b/arch/x86/kernel/smp.c
@@ -217,7 +217,7 @@ static void native_stop_other_cpus(int wait)
pr_emerg("Shutting down cpus with NMI\n");
for_each_cpu(cpu, &cpus_stop_mask)
- __apic_send_IPI(cpu, NMI_VECTOR);
+ __apic_send_IPI(cpu, SMP_STOP_NMI);
}
/*
* Don't wait longer than 10 ms if the caller didn't
--
2.43.0
next prev parent reply other threads:[~2025-06-12 21:50 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-12 21:48 [PATCH v7 00/10] x86: Add support for NMI-source reporting with FRED Sohil Mehta
2025-06-12 21:48 ` [PATCH v7 01/10] x86/fred: Provide separate IRQ vs. NMI wrappers for entry from KVM Sohil Mehta
2025-06-19 3:53 ` Xin Li
2025-06-19 21:35 ` Sohil Mehta
2025-06-12 21:48 ` [PATCH v7 02/10] x86/fred: Pass event data to the NMI entry point " Sohil Mehta
2025-06-13 0:18 ` Sean Christopherson
2025-06-13 15:20 ` Sohil Mehta
2025-06-19 5:02 ` Xin Li
2025-06-19 22:15 ` Sohil Mehta
2025-06-19 22:45 ` Xin Li
2025-06-19 22:57 ` Sohil Mehta
2025-06-20 22:51 ` H. Peter Anvin
2025-06-20 23:18 ` Sean Christopherson
2025-06-20 23:22 ` H. Peter Anvin
2025-06-23 15:39 ` Sean Christopherson
2025-06-23 16:10 ` H. Peter Anvin
2025-06-12 21:48 ` [PATCH v7 03/10] x86/cpufeatures: Add the CPUID feature bit for NMI-source reporting Sohil Mehta
2025-06-19 5:06 ` Xin Li
2025-06-12 21:48 ` [PATCH v7 04/10] x86/nmi: Extend the registration interface to include the NMI-source vector Sohil Mehta
2025-06-12 21:48 ` [PATCH v7 05/10] x86/nmi: Assign and register NMI-source vectors Sohil Mehta
2025-07-07 13:21 ` Zhuo, Qiuxu
2025-07-07 20:00 ` Sohil Mehta
2025-07-08 7:30 ` Zhuo, Qiuxu
2025-07-11 0:32 ` Sohil Mehta
2025-06-12 21:48 ` [PATCH v7 06/10] x86/nmi: Add support to handle NMIs with source information Sohil Mehta
2025-07-07 13:50 ` Zhuo, Qiuxu
2025-07-07 20:32 ` Sohil Mehta
2025-06-12 21:48 ` [PATCH v7 07/10] x86/nmi: Prepare for the new NMI-source vector encoding Sohil Mehta
2025-06-19 7:43 ` Chao Gao
2025-06-19 22:23 ` Sohil Mehta
2025-06-19 22:54 ` Sohil Mehta
2025-06-12 21:48 ` Sohil Mehta [this message]
2025-07-08 18:37 ` [PATCH v7 08/10] x86/nmi: Enable NMI-source for IPIs delivered as NMIs Sean Christopherson
2025-07-10 22:04 ` Sohil Mehta
2025-07-10 22:40 ` Sean Christopherson
2025-07-24 22:59 ` Sohil Mehta
2025-06-12 21:48 ` [PATCH v7 09/10] perf/x86: Enable NMI-source reporting for perfmon Sohil Mehta
2025-06-12 21:48 ` [PATCH v7 10/10] x86/nmi: Print source information with the unknown NMI console message Sohil Mehta
2025-06-13 7:06 ` [PATCH v7 00/10] x86: Add support for NMI-source reporting with FRED Peter Zijlstra
2025-06-13 15:21 ` Sohil Mehta
2025-07-07 13:56 ` Zhuo, Qiuxu
2025-07-07 20:33 ` Sohil Mehta
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