From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com [185.132.182.106]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A0DBF274B5F; Mon, 28 Jul 2025 15:35:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.132.182.106 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753716922; cv=none; b=rcFZ7B6QeJDk38hWbu2VFflTYPJhCncnlK1ZBJCwK5vNHuvwKMUznxq2wjCYqO2mXaiBRFNjQvQ7HaRv1PIH/UFcUKw5QEIU8AKivlDFVzBSeaLaDIEHQ+7wfbGPuFelHhdKuWfrmW8PFeRX2EW/HqzI/QNseeStkU0IFkQVTlM= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1753716922; c=relaxed/simple; bh=dsBC3EguWry8hjqdSMJSjmmwvKBOhx+LpeiASpxU3JM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=SGYFDPHnak6ZqzzEkOGyx1IwbG4hQOUSYWbaPAzpMhViLvorOi29nGYXgyBFHG4Pujsv3QWwhOLYMGZrofaW0ddeIBisHIa+YpmeylJPVLtsP69USfKRKrJiZVvpTI5no9hrfRr01tpyMaNw4UGraeejXn279ZotMRDGwscsV1o= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=foss.st.com; spf=pass smtp.mailfrom=foss.st.com; dkim=pass (2048-bit key) header.d=foss.st.com header.i=@foss.st.com header.b=Q8MSKWUb; arc=none smtp.client-ip=185.132.182.106 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=foss.st.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=foss.st.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=foss.st.com header.i=@foss.st.com header.b="Q8MSKWUb" Received: from pps.filterd (m0288072.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 56SFGvgq026171; Mon, 28 Jul 2025 17:35:04 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=selector1; bh= yH22w/zX/Kh1SA0KcC16iKvtnozL0k8lEkuhUtR9r24=; b=Q8MSKWUbBp6+r5T/ 9h+LdGEEL/+wW/yKzywpJj+HhfcBvbP+0nFRYvl0yjFQ+KOghi9zvmLf7+iXtZzh sVT9k33OHPWvzMwatwFrMQLF8p/6eyjND9UWutat07dB5J8UrRP9+7vC2O0NAriz H47L0OGNVLHPLLsiP2VyCRqJc9VTe6f8u0HEr8homm2KgmuCKwb6UIzxgAWuOt4H BGayJGpFsm6cViMGJP3YxII6f0Pj+kMACZBW6aBbPm4HefwimLqLUovqbdrUgW9d FZCKWzPl2yDeMpCz1uP4sDZPsbU7gzWBwNrIeBf4msFv/O+WaMK+ZhEsQ6e+1Y69 BDEVNQ== Received: from beta.dmz-ap.st.com (beta.dmz-ap.st.com [138.198.100.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 484memhajd-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 28 Jul 2025 17:35:04 +0200 (MEST) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id CCD2840044; Mon, 28 Jul 2025 17:33:48 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node2.st.com [10.75.129.70]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 3829378C911; Mon, 28 Jul 2025 17:30:10 +0200 (CEST) Received: from localhost (10.252.23.100) by SHFDAG1NODE2.st.com (10.75.129.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Mon, 28 Jul 2025 17:30:09 +0200 From: =?utf-8?q?Cl=C3=A9ment_Le_Goffic?= Date: Mon, 28 Jul 2025 17:29:51 +0200 Subject: [PATCH v5 20/20] arm64: dts: st: support ddrperfm on stm32mp257f-ev1 Precedence: bulk X-Mailing-List: linux-perf-users@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit Message-ID: <20250728-ddrperfm-upstream-v5-20-03f1be8ad396@foss.st.com> References: <20250728-ddrperfm-upstream-v5-0-03f1be8ad396@foss.st.com> In-Reply-To: <20250728-ddrperfm-upstream-v5-0-03f1be8ad396@foss.st.com> To: Will Deacon , Mark Rutland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue , Philipp Zabel , Jonathan Corbet , Gatien Chevallier , Michael Turquette , Stephen Boyd , Gabriel Fernandez , Krzysztof Kozlowski , Le Goffic , Julius Werner CC: , , , , , , , =?utf-8?q?Cl=C3=A9ment_Le_Goffic?= X-Mailer: b4 0.15-dev-8018a X-ClientProxiedBy: SHFCAS1NODE2.st.com (10.75.129.73) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-07-28_03,2025-07-28_01,2025-03-28_01 Configure DDRPERFM node on stm32mp257f-ev1 board. Disable the node as DDRPERFM will produce an error message if it's clock (shared with the DDRCTRL on STM32MP25x) is secured by common bootloaders. Signed-off-by: Clément Le Goffic --- arch/arm64/boot/dts/st/stm32mp257f-ev1.dts | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts b/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts index e11ce66be948..3d1e2000f631 100644 --- a/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts +++ b/arch/arm64/boot/dts/st/stm32mp257f-ev1.dts @@ -130,6 +130,11 @@ csi_source: endpoint { }; }; +&ddrperfm { + memory-channel = <&ddr_channel>; + status = "disabled"; +}; + &dcmipp { status = "okay"; port { -- 2.43.0