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From: Leo Yan <leo.yan@arm.com>
To: Arnaldo Carvalho de Melo <acme@kernel.org>,
	 Namhyung Kim <namhyung@kernel.org>, Jiri Olsa <jolsa@kernel.org>,
	 Ian Rogers <irogers@google.com>,
	Adrian Hunter <adrian.hunter@intel.com>,
	 James Clark <james.clark@linaro.org>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>,
	 linux-perf-users@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,  Leo Yan <leo.yan@arm.com>
Subject: [PATCH v2 02/25] perf arm_spe: Unify operation naming
Date: Fri, 17 Oct 2025 11:04:51 +0100	[thread overview]
Message-ID: <20251017-perf_support_arm_spev1-3-v2-2-2d41e4746e1b@arm.com> (raw)
In-Reply-To: <20251017-perf_support_arm_spev1-3-v2-0-2d41e4746e1b@arm.com>

Rename extended subclass and SVE/SME register access subclass, so that
the naming can be consistent cross all sub classes.

Add an log "SVE-SME-REG" for the SVE/SME register access, this is easier
for parsing.

Signed-off-by: Leo Yan <leo.yan@arm.com>
---
 tools/perf/util/arm-spe-decoder/arm-spe-decoder.c   |  2 +-
 .../perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c | 21 ++++++++++-----------
 .../perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h |  4 ++--
 3 files changed, 13 insertions(+), 14 deletions(-)

diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c
index 96eb7cced6fd1574f5d823e4c67b9051dcf183ed..b0fb896abad48de93aa1ed560029f9bc9ae969e9 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c
@@ -200,7 +200,7 @@ static int arm_spe_read_record(struct arm_spe_decoder *decoder)
 					decoder->record.op |= ARM_SPE_OP_ST;
 				else
 					decoder->record.op |= ARM_SPE_OP_LD;
-				if (SPE_OP_PKT_IS_LDST_SVE(payload))
+				if (SPE_OP_PKT_LDST_SUBCLASS_SVE_SME_REG(payload))
 					decoder->record.op |= ARM_SPE_OP_SVE_LDST;
 				break;
 			case SPE_OP_PKT_HDR_CLASS_OTHER:
diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
index 1a1ffe50ee73ab4400fd1163d0e84e54f4d8ab0b..f6e9c58ce62f3ae227a79d91caefaef4bd87d98a 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c
@@ -362,31 +362,30 @@ static int arm_spe_pkt_desc_op_type(const struct arm_spe_pkt *packet,
 		arm_spe_pkt_out_string(&err, &buf, &buf_len,
 				       payload & 0x1 ? "ST" : "LD");
 
-		if (SPE_OP_PKT_IS_LDST_ATOMIC(payload)) {
+		if (SPE_OP_PKT_LDST_SUBCLASS_EXTENDED(payload)) {
 			if (payload & SPE_OP_PKT_AT)
 				arm_spe_pkt_out_string(&err, &buf, &buf_len, " AT");
 			if (payload & SPE_OP_PKT_EXCL)
 				arm_spe_pkt_out_string(&err, &buf, &buf_len, " EXCL");
 			if (payload & SPE_OP_PKT_AR)
 				arm_spe_pkt_out_string(&err, &buf, &buf_len, " AR");
-		}
-
-		if (SPE_OP_PKT_LDST_SUBCLASS_SIMD_FP(payload))
+		} else if (SPE_OP_PKT_LDST_SUBCLASS_SIMD_FP(payload)) {
 			arm_spe_pkt_out_string(&err, &buf, &buf_len, " SIMD-FP");
-		else if (SPE_OP_PKT_LDST_SUBCLASS_GP_REG(payload))
+		} else if (SPE_OP_PKT_LDST_SUBCLASS_GP_REG(payload)) {
 			arm_spe_pkt_out_string(&err, &buf, &buf_len, " GP-REG");
-		else if (SPE_OP_PKT_LDST_SUBCLASS_UNSPEC_REG(payload))
+		} else if (SPE_OP_PKT_LDST_SUBCLASS_UNSPEC_REG(payload)) {
 			arm_spe_pkt_out_string(&err, &buf, &buf_len, " UNSPEC-REG");
-		else if (SPE_OP_PKT_LDST_SUBCLASS_NV_SYSREG(payload))
+		} else if (SPE_OP_PKT_LDST_SUBCLASS_NV_SYSREG(payload)) {
 			arm_spe_pkt_out_string(&err, &buf, &buf_len, " NV-SYSREG");
-		else if (SPE_OP_PKT_LDST_SUBCLASS_MTE_TAG(payload))
+		} else if (SPE_OP_PKT_LDST_SUBCLASS_MTE_TAG(payload)) {
 			arm_spe_pkt_out_string(&err, &buf, &buf_len, " MTE-TAG");
-		else if (SPE_OP_PKT_LDST_SUBCLASS_MEMCPY(payload))
+		} else if (SPE_OP_PKT_LDST_SUBCLASS_MEMCPY(payload)) {
 			arm_spe_pkt_out_string(&err, &buf, &buf_len, " MEMCPY");
-		else if (SPE_OP_PKT_LDST_SUBCLASS_MEMSET(payload))
+		} else if (SPE_OP_PKT_LDST_SUBCLASS_MEMSET(payload)) {
 			arm_spe_pkt_out_string(&err, &buf, &buf_len, " MEMSET");
+		} else if (SPE_OP_PKT_LDST_SUBCLASS_SVE_SME_REG(payload)) {
+			arm_spe_pkt_out_string(&err, &buf, &buf_len, " SVE-SME-REG");
 
-		if (SPE_OP_PKT_IS_LDST_SVE(payload)) {
 			/* SVE effective vector length */
 			arm_spe_pkt_out_string(&err, &buf, &buf_len, " EVLEN %d",
 					       SPE_OP_PKG_SVE_EVL(payload));
diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h
index 75e355fe3438cc07704cb61a66ca162bd0904042..cb947e625918922dc1fa25cf8843b09661197782 100644
--- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h
+++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.h
@@ -133,14 +133,14 @@ enum arm_spe_events {
 #define SPE_OP_PKT_LDST_SUBCLASS_MEMCPY(v)	(((v) & GENMASK_ULL(7, 1)) == 0x20)
 #define SPE_OP_PKT_LDST_SUBCLASS_MEMSET(v)	(((v) & GENMASK_ULL(7, 0)) == 0x25)
 
-#define SPE_OP_PKT_IS_LDST_ATOMIC(v)		(((v) & (GENMASK_ULL(7, 5) | BIT(1))) == 0x2)
+#define SPE_OP_PKT_LDST_SUBCLASS_EXTENDED(v)	(((v) & (GENMASK_ULL(7, 5) | BIT(1))) == 0x2)
 
 #define SPE_OP_PKT_AR				BIT(4)
 #define SPE_OP_PKT_EXCL				BIT(3)
 #define SPE_OP_PKT_AT				BIT(2)
 #define SPE_OP_PKT_ST				BIT(0)
 
-#define SPE_OP_PKT_IS_LDST_SVE(v)		(((v) & (BIT(3) | BIT(1))) == 0x8)
+#define SPE_OP_PKT_LDST_SUBCLASS_SVE_SME_REG(v)	(((v) & (BIT(3) | BIT(1))) == 0x8)
 
 #define SPE_OP_PKT_SVE_SG			BIT(7)
 /*

-- 
2.34.1


  parent reply	other threads:[~2025-10-17 10:05 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-17 10:04 [PATCH v2 00/25] perf arm_spe: Extend operations Leo Yan
2025-10-17 10:04 ` [PATCH v2 01/25] perf arm_spe: Fix memset subclass in operation Leo Yan
2025-10-17 10:04 ` Leo Yan [this message]
2025-10-17 10:04 ` [PATCH v2 03/25] perf arm_spe: Decode GCS operation Leo Yan
2025-10-17 10:04 ` [PATCH v2 04/25] perf arm_spe: Rename SPE_OP_PKT_IS_OTHER_SVE_OP macro Leo Yan
2025-10-17 10:04 ` [PATCH v2 05/25] perf arm_spe: Decode ASE and FP fields in other operation Leo Yan
2025-10-17 10:04 ` [PATCH v2 06/25] perf arm_spe: Decode SME data processing packet Leo Yan
2025-10-17 10:04 ` [PATCH v2 07/25] perf arm_spe: Remove unused operation types Leo Yan
2025-10-17 10:04 ` [PATCH v2 08/25] perf arm_spe: Consolidate " Leo Yan
2025-10-17 10:04 ` [PATCH v2 09/25] perf arm_spe: Introduce data processing macro for SVE operations Leo Yan
2025-10-17 10:04 ` [PATCH v2 10/25] perf arm_spe: Report register access in record Leo Yan
2025-10-17 10:05 ` [PATCH v2 11/25] perf arm_spe: Report MTE allocation tag " Leo Yan
2025-10-17 10:05 ` [PATCH v2 12/25] perf arm_spe: Report extended memory operations in records Leo Yan
2025-10-17 10:05 ` [PATCH v2 13/25] perf arm_spe: Report associated info for SVE / SME operations Leo Yan
2025-10-17 10:05 ` [PATCH v2 14/25] perf arm_spe: Report memset and memcpy in records Leo Yan
2025-10-17 10:05 ` [PATCH v2 15/25] perf arm_spe: Report GCS in record Leo Yan
2025-10-17 10:05 ` [PATCH v2 16/25] perf arm_spe: Expose SIMD information in other operations Leo Yan
2025-10-17 10:05 ` [PATCH v2 17/25] perf arm_spe: Synthesize memory samples for SIMD operations Leo Yan
2025-10-17 10:05 ` [PATCH v2 18/25] perf/uapi: Extend data source fields Leo Yan
2025-11-12 18:03   ` Leo Yan
2025-11-12 18:15     ` Leo Yan
2025-10-17 10:05 ` [PATCH v2 19/25] tools/include: Sync uapi/linux/perf.h with the kernel sources Leo Yan
2025-10-17 10:05 ` [PATCH v2 20/25] perf mem: Print extended fields Leo Yan
2025-10-17 10:05 ` [PATCH v2 21/25] perf arm_spe: Set extended fields in data source Leo Yan
2025-10-17 10:05 ` [PATCH v2 22/25] perf sort: Support sort ASE and SME Leo Yan
2025-10-17 10:05 ` [PATCH v2 23/25] perf sort: Sort disabled and full predicated flags Leo Yan
2025-10-17 10:05 ` [PATCH v2 24/25] perf report: Update document for SIMD flags Leo Yan
2025-10-17 10:05 ` [PATCH v2 25/25] perf arm_spe: Improve SIMD flags setting Leo Yan

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