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From: Ian Rogers <irogers@google.com>
To: Adrian Hunter <adrian.hunter@intel.com>,
	 Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	 Arnaldo Carvalho de Melo <acme@kernel.org>,
	Benjamin Gray <bgray@linux.ibm.com>,
	 Caleb Biggers <caleb.biggers@intel.com>,
	Edward Baker <edward.baker@intel.com>,
	 Ian Rogers <irogers@google.com>, Ingo Molnar <mingo@redhat.com>,
	 James Clark <james.clark@linaro.org>,
	Jing Zhang <renyu.zj@linux.alibaba.com>,
	 Jiri Olsa <jolsa@kernel.org>,
	John Garry <john.g.garry@oracle.com>, Leo Yan <leo.yan@arm.com>,
	 Namhyung Kim <namhyung@kernel.org>,
	Perry Taylor <perry.taylor@intel.com>,
	 Peter Zijlstra <peterz@infradead.org>,
	Samantha Alt <samantha.alt@intel.com>,
	 Sandipan Das <sandipan.das@amd.com>,
	Thomas Falcon <thomas.falcon@intel.com>,
	 Weilin Wang <weilin.wang@intel.com>, Xu Yang <xu.yang_2@nxp.com>,
	linux-kernel@vger.kernel.org,  linux-perf-users@vger.kernel.org
Subject: [PATCH v8 37/52] perf jevents: Add L2 metrics for Intel
Date: Wed, 12 Nov 2025 19:20:25 -0800	[thread overview]
Message-ID: <20251113032040.1994090-38-irogers@google.com> (raw)
In-Reply-To: <20251113032040.1994090-1-irogers@google.com>

Give a breakdown of various L2 counters as metrics, including totals,
reads, hardware prefetcher, RFO, code and evictions.

Signed-off-by: Ian Rogers <irogers@google.com>
---
 tools/perf/pmu-events/intel_metrics.py | 170 +++++++++++++++++++++++++
 1 file changed, 170 insertions(+)

diff --git a/tools/perf/pmu-events/intel_metrics.py b/tools/perf/pmu-events/intel_metrics.py
index 7fcc0a1c544d..d190d97f4aff 100755
--- a/tools/perf/pmu-events/intel_metrics.py
+++ b/tools/perf/pmu-events/intel_metrics.py
@@ -263,6 +263,175 @@ def IntelBr():
                        description="breakdown of retired branch instructions")
 
 
+def IntelL2() -> Optional[MetricGroup]:
+    try:
+        DC_HIT = Event("L2_RQSTS.DEMAND_DATA_RD_HIT")
+    except:
+        return None
+    try:
+        DC_MISS = Event("L2_RQSTS.DEMAND_DATA_RD_MISS")
+        l2_dmnd_miss = DC_MISS
+        l2_dmnd_rd_all = DC_MISS + DC_HIT
+    except:
+        DC_ALL = Event("L2_RQSTS.ALL_DEMAND_DATA_RD")
+        l2_dmnd_miss = DC_ALL - DC_HIT
+        l2_dmnd_rd_all = DC_ALL
+    l2_dmnd_mrate = d_ratio(l2_dmnd_miss, interval_sec)
+    l2_dmnd_rrate = d_ratio(l2_dmnd_rd_all, interval_sec)
+
+    DC_PFH = None
+    DC_PFM = None
+    l2_pf_all = None
+    l2_pf_mrate = None
+    l2_pf_rrate = None
+    try:
+        DC_PFH = Event("L2_RQSTS.PF_HIT")
+        DC_PFM = Event("L2_RQSTS.PF_MISS")
+        l2_pf_all = DC_PFH + DC_PFM
+        l2_pf_mrate = d_ratio(DC_PFM, interval_sec)
+        l2_pf_rrate = d_ratio(l2_pf_all, interval_sec)
+    except:
+        pass
+
+    DC_RFOH = None
+    DC_RFOM = None
+    l2_rfo_all = None
+    l2_rfo_mrate = None
+    l2_rfo_rrate = None
+    try:
+        DC_RFOH = Event("L2_RQSTS.RFO_HIT")
+        DC_RFOM = Event("L2_RQSTS.RFO_MISS")
+        l2_rfo_all = DC_RFOH + DC_RFOM
+        l2_rfo_mrate = d_ratio(DC_RFOM, interval_sec)
+        l2_rfo_rrate = d_ratio(l2_rfo_all, interval_sec)
+    except:
+        pass
+
+    DC_CH = None
+    try:
+        DC_CH = Event("L2_RQSTS.CODE_RD_HIT")
+    except:
+        pass
+    DC_CM = Event("L2_RQSTS.CODE_RD_MISS")
+    DC_IN = Event("L2_LINES_IN.ALL")
+    DC_OUT_NS = None
+    DC_OUT_S = None
+    l2_lines_out = None
+    l2_out_rate = None
+    wbn = None
+    isd = None
+    try:
+        DC_OUT_NS = Event("L2_LINES_OUT.NON_SILENT",
+                          "L2_LINES_OUT.DEMAND_DIRTY",
+                          "L2_LINES_IN.S")
+        DC_OUT_S = Event("L2_LINES_OUT.SILENT",
+                         "L2_LINES_OUT.DEMAND_CLEAN",
+                         "L2_LINES_IN.I")
+        if DC_OUT_S.name == "L2_LINES_OUT.SILENT" and (
+                args.model.startswith("skylake") or
+                args.model == "cascadelakex"):
+            DC_OUT_S.name = "L2_LINES_OUT.SILENT/any/"
+        # bring is back to per-CPU
+        l2_s = Select(DC_OUT_S / 2, Literal("#smt_on"), DC_OUT_S)
+        l2_ns = DC_OUT_NS
+        l2_lines_out = l2_s + l2_ns
+        l2_out_rate = d_ratio(l2_lines_out, interval_sec)
+        nlr = max(l2_ns - DC_WB_U - DC_WB_D, 0)
+        wbn = d_ratio(nlr, interval_sec)
+        isd = d_ratio(l2_s, interval_sec)
+    except:
+        pass
+    DC_OUT_U = None
+    l2_pf_useless = None
+    l2_useless_rate = None
+    try:
+        DC_OUT_U = Event("L2_LINES_OUT.USELESS_HWPF")
+        l2_pf_useless = DC_OUT_U
+        l2_useless_rate = d_ratio(l2_pf_useless, interval_sec)
+    except:
+        pass
+    DC_WB_U = None
+    DC_WB_D = None
+    wbu = None
+    wbd = None
+    try:
+        DC_WB_U = Event("IDI_MISC.WB_UPGRADE")
+        DC_WB_D = Event("IDI_MISC.WB_DOWNGRADE")
+        wbu = d_ratio(DC_WB_U, interval_sec)
+        wbd = d_ratio(DC_WB_D, interval_sec)
+    except:
+        pass
+
+    l2_lines_in = DC_IN
+    l2_code_all = (DC_CH + DC_CM) if DC_CH else None
+    l2_code_rate = d_ratio(l2_code_all, interval_sec) if DC_CH else None
+    l2_code_miss_rate = d_ratio(DC_CM, interval_sec)
+    l2_in_rate = d_ratio(l2_lines_in, interval_sec)
+
+    return MetricGroup("lpm_l2", [
+        MetricGroup("lpm_l2_totals", [
+            Metric("lpm_l2_totals_in", "L2 cache total in per second",
+                   l2_in_rate, "In/s"),
+            Metric("lpm_l2_totals_out", "L2 cache total out per second",
+                   l2_out_rate, "Out/s") if l2_out_rate else None,
+        ]),
+        MetricGroup("lpm_l2_rd", [
+            Metric("lpm_l2_rd_hits", "L2 cache data read hits",
+                   d_ratio(DC_HIT, l2_dmnd_rd_all), "100%"),
+            Metric("lpm_l2_rd_hits", "L2 cache data read hits",
+                   d_ratio(l2_dmnd_miss, l2_dmnd_rd_all), "100%"),
+            Metric("lpm_l2_rd_requests", "L2 cache data read requests per second",
+                   l2_dmnd_rrate, "requests/s"),
+            Metric("lpm_l2_rd_misses", "L2 cache data read misses per second",
+                   l2_dmnd_mrate, "misses/s"),
+        ]),
+        MetricGroup("lpm_l2_hwpf", [
+            Metric("lpm_l2_hwpf_hits", "L2 cache hardware prefetcher hits",
+                   d_ratio(DC_PFH, l2_pf_all), "100%"),
+            Metric("lpm_l2_hwpf_misses", "L2 cache hardware prefetcher misses",
+                   d_ratio(DC_PFM, l2_pf_all), "100%"),
+            Metric("lpm_l2_hwpf_useless", "L2 cache hardware prefetcher useless prefetches per second",
+                   l2_useless_rate, "100%") if l2_useless_rate else None,
+            Metric("lpm_l2_hwpf_requests", "L2 cache hardware prefetcher requests per second",
+                   l2_pf_rrate, "100%"),
+            Metric("lpm_l2_hwpf_misses", "L2 cache hardware prefetcher misses per second",
+                   l2_pf_mrate, "100%"),
+        ]) if DC_PFH else None,
+        MetricGroup("lpm_l2_rfo", [
+            Metric("lpm_l2_rfo_hits", "L2 cache request for ownership (RFO) hits",
+                   d_ratio(DC_RFOH, l2_rfo_all), "100%"),
+            Metric("lpm_l2_rfo_misses", "L2 cache request for ownership (RFO) misses",
+                   d_ratio(DC_RFOM, l2_rfo_all), "100%"),
+            Metric("lpm_l2_rfo_requests", "L2 cache request for ownership (RFO) requests per second",
+                   l2_rfo_rrate, "requests/s"),
+            Metric("lpm_l2_rfo_misses", "L2 cache request for ownership (RFO) misses per second",
+                   l2_rfo_mrate, "misses/s"),
+        ]) if DC_RFOH else None,
+        MetricGroup("lpm_l2_code", [
+            Metric("lpm_l2_code_hits", "L2 cache code hits",
+                   d_ratio(DC_CH, l2_code_all), "100%") if DC_CH else None,
+            Metric("lpm_l2_code_misses", "L2 cache code misses",
+                   d_ratio(DC_CM, l2_code_all), "100%") if DC_CH else None,
+            Metric("lpm_l2_code_requests", "L2 cache code requests per second",
+                   l2_code_rate, "requests/s") if DC_CH else None,
+            Metric("lpm_l2_code_misses", "L2 cache code misses per second",
+                   l2_code_miss_rate, "misses/s"),
+        ]),
+        MetricGroup("lpm_l2_evict", [
+            MetricGroup("lpm_l2_evict_mef_lines", [
+                Metric("lpm_l2_evict_mef_lines_l3_hot_lru", "L2 evictions M/E/F lines L3 hot LRU per second",
+                       wbu, "HotLRU/s") if wbu else None,
+                Metric("lpm_l2_evict_mef_lines_l3_norm_lru", "L2 evictions M/E/F lines L3 normal LRU per second",
+                       wbn, "NormLRU/s") if wbn else None,
+                Metric("lpm_l2_evict_mef_lines_dropped", "L2 evictions M/E/F lines dropped per second",
+                       wbd, "dropped/s") if wbd else None,
+                Metric("lpm_l2_evict_is_lines_dropped", "L2 evictions I/S lines dropped per second",
+                       isd, "dropped/s") if isd else None,
+            ]),
+        ]),
+    ], description="L2 data cache analysis")
+
+
 def IntelPorts() -> Optional[MetricGroup]:
     pipeline_events = json.load(
         open(f"{_args.events_path}/x86/{_args.model}/pipeline.json"))
@@ -386,6 +555,7 @@ def main() -> None:
         Smi(),
         Tsx(),
         IntelBr(),
+        IntelL2(),
         IntelPorts(),
         IntelSwpf(),
     ])
-- 
2.51.2.1041.gc1ab5b90ca-goog


  parent reply	other threads:[~2025-11-13  3:22 UTC|newest]

Thread overview: 65+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-13  3:19 [PATCH v8 00/52] AMD, ARM, Intel metric generation with Python Ian Rogers
2025-11-13  3:19 ` [PATCH v8 01/52] perf python: Correct copying of metric_leader in an evsel Ian Rogers
2025-11-13  3:19 ` [PATCH v8 02/52] perf ilist: Be tolerant of reading a metric on the wrong CPU Ian Rogers
2025-11-13  3:19 ` [PATCH v8 03/52] perf jevents: Allow multiple metricgroups.json files Ian Rogers
2025-11-13  3:19 ` [PATCH v8 04/52] perf jevents: Update metric constraint support Ian Rogers
2025-11-13  3:19 ` [PATCH v8 05/52] perf jevents: Add descriptions to metricgroup abstraction Ian Rogers
2025-11-13  3:19 ` [PATCH v8 06/52] perf jevents: Allow metric groups not to be named Ian Rogers
2025-11-13  3:19 ` [PATCH v8 07/52] perf jevents: Support parsing negative exponents Ian Rogers
2025-11-13  3:19 ` [PATCH v8 08/52] perf jevents: Term list fix in event parsing Ian Rogers
2025-11-13  3:19 ` [PATCH v8 09/52] perf jevents: Add threshold expressions to Metric Ian Rogers
2025-11-13  3:19 ` [PATCH v8 10/52] perf jevents: Move json encoding to its own functions Ian Rogers
2025-11-13  3:19 ` [PATCH v8 11/52] perf jevents: Drop duplicate pending metrics Ian Rogers
2025-11-13  3:20 ` [PATCH v8 12/52] perf jevents: Skip optional metrics in metric group list Ian Rogers
2025-11-13  3:20 ` [PATCH v8 13/52] perf jevents: Build support for generating metrics from python Ian Rogers
2025-11-13  3:20 ` [PATCH v8 14/52] perf jevents: Add load event json to verify and allow fallbacks Ian Rogers
2025-11-13  3:20 ` [PATCH v8 15/52] perf jevents: Add RAPL event metric for AMD zen models Ian Rogers
2025-11-26  5:05   ` Sandipan Das
2025-11-28  9:20     ` Ian Rogers
2025-11-28 11:33       ` Sandipan Das
2025-11-13  3:20 ` [PATCH v8 16/52] perf jevents: Add idle " Ian Rogers
2025-11-13  3:20 ` [PATCH v8 17/52] perf jevents: Add upc metric for uops per cycle for AMD Ian Rogers
2025-11-13  3:20 ` [PATCH v8 18/52] perf jevents: Add br metric group for branch statistics on AMD Ian Rogers
2025-11-13  3:20 ` [PATCH v8 19/52] perf jevents: Add software prefetch (swpf) metric group for AMD Ian Rogers
2025-11-26 10:05   ` Sandipan Das
2025-11-13  3:20 ` [PATCH v8 20/52] perf jevents: Add hardware prefetch (hwpf) " Ian Rogers
2025-11-26 10:17   ` Sandipan Das
2025-11-13  3:20 ` [PATCH v8 21/52] perf jevents: Add itlb " Ian Rogers
2025-11-13  3:20 ` [PATCH v8 22/52] perf jevents: Add dtlb " Ian Rogers
2025-11-13  3:20 ` [PATCH v8 23/52] perf jevents: Add uncore l3 " Ian Rogers
2025-11-26  5:20   ` Sandipan Das
2025-11-13  3:20 ` [PATCH v8 24/52] perf jevents: Add load store breakdown metrics ldst " Ian Rogers
2025-11-13  3:20 ` [PATCH v8 25/52] perf jevents: Add ILP metrics " Ian Rogers
2025-11-26  6:26   ` Sandipan Das
2025-11-13  3:20 ` [PATCH v8 26/52] perf jevents: Add context switch " Ian Rogers
2025-11-13  3:20 ` [PATCH v8 27/52] perf jevents: Add uop cache hit/miss rates " Ian Rogers
2025-11-26  5:42   ` Sandipan Das
2025-11-13  3:20 ` [PATCH v8 28/52] perf jevents: Add RAPL metrics for all Intel models Ian Rogers
2025-11-13  3:20 ` [PATCH v8 29/52] perf jevents: Add idle metric for " Ian Rogers
2025-11-13  3:20 ` [PATCH v8 30/52] perf jevents: Add CheckPmu to see if a PMU is in loaded json events Ian Rogers
2025-11-13  3:20 ` [PATCH v8 31/52] perf jevents: Add smi metric group for Intel models Ian Rogers
2025-11-13  3:20 ` [PATCH v8 32/52] perf jevents: Mark metrics with experimental events as experimental Ian Rogers
2025-11-13  3:20 ` [PATCH v8 33/52] perf jevents: Add tsx metric group for Intel models Ian Rogers
2025-11-13  3:20 ` [PATCH v8 34/52] perf jevents: Add br metric group for branch statistics on Intel Ian Rogers
2025-11-13  3:20 ` [PATCH v8 35/52] perf jevents: Add software prefetch (swpf) metric group for Intel Ian Rogers
2025-11-13  3:20 ` [PATCH v8 36/52] perf jevents: Add ports metric group giving utilization on Intel Ian Rogers
2025-11-13  3:20 ` Ian Rogers [this message]
2025-11-13  3:20 ` [PATCH v8 38/52] perf jevents: Add load store breakdown metrics ldst for Intel Ian Rogers
2025-11-13  3:20 ` [PATCH v8 39/52] perf jevents: Add ILP metrics " Ian Rogers
2025-11-13  3:20 ` [PATCH v8 40/52] perf jevents: Add context switch " Ian Rogers
2025-11-13  3:20 ` [PATCH v8 41/52] perf jevents: Add FPU " Ian Rogers
2025-11-13  3:20 ` [PATCH v8 42/52] perf jevents: Add Miss Level Parallelism (MLP) metric " Ian Rogers
2025-11-13  3:20 ` [PATCH v8 43/52] perf jevents: Add mem_bw " Ian Rogers
2025-11-13  3:20 ` [PATCH v8 44/52] perf jevents: Add local/remote "mem" breakdown metrics " Ian Rogers
2025-11-13  3:20 ` [PATCH v8 45/52] perf jevents: Add dir " Ian Rogers
2025-11-13  3:20 ` [PATCH v8 46/52] perf jevents: Add C-State metrics from the PCU PMU " Ian Rogers
2025-11-13  3:20 ` [PATCH v8 47/52] perf jevents: Add local/remote miss latency metrics " Ian Rogers
2025-11-13  3:20 ` [PATCH v8 48/52] perf jevents: Add upi_bw metric " Ian Rogers
2025-11-13  3:20 ` [PATCH v8 49/52] perf jevents: Add mesh bandwidth saturation " Ian Rogers
2025-11-13  3:20 ` [PATCH v8 50/52] perf jevents: Add collection of topdown like metrics for arm64 Ian Rogers
2025-11-13  3:20 ` [PATCH v8 51/52] perf jevents: Add cycles breakdown metric for arm64/AMD/Intel Ian Rogers
2025-11-26  6:32   ` Sandipan Das
2025-11-13  3:20 ` [PATCH v8 52/52] perf jevents: Validate that all names given an Event Ian Rogers
2025-11-19 18:30 ` [PATCH v8 00/52] AMD, ARM, Intel metric generation with Python Ian Rogers
2025-11-20 20:32 ` Falcon, Thomas
2025-11-20 21:10 ` Namhyung Kim

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