From: Leo Yan <leo.yan@arm.com>
To: Suzuki K Poulose <suzuki.poulose@arm.com>,
Mike Leach <mike.leach@linaro.org>,
James Clark <james.clark@linaro.org>,
Anshuman Khandual <anshuman.khandual@arm.com>,
Yeoreum Yun <yeoreum.yun@arm.com>, Will Deacon <will@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Tamas Petz <tamas.petz@arm.com>,
Tamas Zsoldos <tamas.zsoldos@arm.com>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
Namhyung Kim <namhyung@kernel.org>, Jiri Olsa <jolsa@kernel.org>,
Ian Rogers <irogers@google.com>,
Adrian Hunter <adrian.hunter@intel.com>
Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org,
Leo Yan <leo.yan@arm.com>
Subject: [PATCH 13/19] coresight: trbe: Remove misleading comment
Date: Mon, 01 Dec 2025 11:22:03 +0000 [thread overview]
Message-ID: <20251201-trbe_buffer_refactor_v1-1-v1-13-7da32b076b28@arm.com> (raw)
In-Reply-To: <20251201-trbe_buffer_refactor_v1-1-v1-0-7da32b076b28@arm.com>
Since the rounded-up wakeup address is always higher than the head, the
limit cannot be less than the head caused by wakeup capping.
The described scenario is never valid caused by wakeup capping, remove
the comment to avoid confusion.
Signed-off-by: Leo Yan <leo.yan@arm.com>
---
drivers/hwtracing/coresight/coresight-trbe.c | 16 ++--------------
1 file changed, 2 insertions(+), 14 deletions(-)
diff --git a/drivers/hwtracing/coresight/coresight-trbe.c b/drivers/hwtracing/coresight/coresight-trbe.c
index 48bc03bd339908b5eac9466dc60325ff1b238976..206eaf103cd94f36220cb6bddd1a78012f5de35a 100644
--- a/drivers/hwtracing/coresight/coresight-trbe.c
+++ b/drivers/hwtracing/coresight/coresight-trbe.c
@@ -488,10 +488,10 @@ static unsigned long __trbe_normal_offset(struct perf_output_handle *handle)
limit = min(limit, round_up(wakeup, PAGE_SIZE));
/*
- * There are two situation when this can happen i.e limit is before
+ * There is a situation when this can happen i.e limit is before
* the head and hence TRBE cannot be configured.
*
- * 1) head < tail (aligned down with PAGE_SIZE) and also they are both
+ * head < tail (aligned down with PAGE_SIZE) and also they are both
* within the same PAGE size range.
*
* PAGE_SIZE
@@ -502,18 +502,6 @@ static unsigned long __trbe_normal_offset(struct perf_output_handle *handle)
* |$$$$$$$$$$$$$$$$$$$|========|$$$$$$$|
* +------------|------|--------|-------+
* trbe_base trbe_base + nr_pages
- *
- * 2) head < wakeup (aligned up with PAGE_SIZE) < tail and also both
- * head and wakeup are within same PAGE size range.
- *
- * PAGE_SIZE
- * |----------------------|
- *
- * limit head wakeup tail
- * +----|------|-------|--------|-------+
- * |$$$$$$$$$$$|=======|========|$$$$$$$|
- * +----|------|-------|--------|-------+
- * trbe_base trbe_base + nr_pages
*/
if (limit > head)
return limit;
--
2.34.1
next prev parent reply other threads:[~2025-12-01 11:22 UTC|newest]
Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-01 11:21 [PATCH 00/19] coresight: trbe: Support trigger and circle buffer modes Leo Yan
2025-12-01 11:21 ` [PATCH 01/19] coresight: trbe: Use helpers for checking errata Leo Yan
2025-12-04 12:08 ` Anshuman Khandual
2025-12-01 11:21 ` [PATCH 02/19] coresight: trbe: Remove redundant disable operation Leo Yan
2025-12-04 12:25 ` Anshuman Khandual
2025-12-01 11:21 ` [PATCH 03/19] coresight: trbe: Remove buffer disabling in trbe_handle_overflow() Leo Yan
2025-12-04 12:31 ` Anshuman Khandual
2025-12-01 11:21 ` [PATCH 04/19] coresight: trbe: Remove set_trbe_disabled() from the enable flow Leo Yan
2025-12-04 12:43 ` Anshuman Khandual
2025-12-04 13:25 ` Leo Yan
2025-12-01 11:21 ` [PATCH 05/19] coresight: trbe: Refactor status clearing Leo Yan
2025-12-04 12:57 ` Anshuman Khandual
2025-12-09 15:29 ` Leo Yan
2025-12-01 11:21 ` [PATCH 06/19] coresight: trbe: Refactor syndrome decoding Leo Yan
2025-12-02 11:06 ` Suzuki K Poulose
2025-12-02 14:24 ` Leo Yan
2025-12-09 13:17 ` James Clark
2025-12-09 16:06 ` Leo Yan
2025-12-05 4:10 ` Anshuman Khandual
2025-12-09 15:57 ` Leo Yan
2025-12-01 11:21 ` [PATCH 07/19] coresight: trbe: Refactor AUX flag setting Leo Yan
2025-12-02 11:15 ` Suzuki K Poulose
2025-12-02 14:21 ` Leo Yan
2025-12-09 13:37 ` James Clark
2025-12-10 15:43 ` Leo Yan
2025-12-12 14:50 ` James Clark
2025-12-12 15:27 ` Leo Yan
2025-12-12 15:52 ` James Clark
2025-12-01 11:21 ` [PATCH 08/19] coresight: trbe: Use PERF_AUX_FLAG_PARTIAL instead of PERF_AUX_FLAG_COLLISION Leo Yan
2025-12-05 4:28 ` Anshuman Khandual
2025-12-09 13:40 ` James Clark
2025-12-10 16:19 ` Leo Yan
2025-12-01 11:21 ` [PATCH 09/19] coresight: trbe: Add fault action argument to trbe_handle_overflow() Leo Yan
2025-12-01 11:22 ` [PATCH 10/19] coresight: trbe: Always check fault action when updating buffer Leo Yan
2025-12-02 12:00 ` Suzuki K Poulose
2025-12-01 11:22 ` [PATCH 11/19] coresight: trbe: Apply overwrite erratum for only wrap event Leo Yan
2025-12-02 12:05 ` Suzuki K Poulose
2025-12-02 16:56 ` Leo Yan
2025-12-02 17:12 ` Leo Yan
2025-12-01 11:22 ` [PATCH 12/19] coresight: trbe: Calculate size for buffer wrapping Leo Yan
2025-12-01 11:22 ` Leo Yan [this message]
2025-12-01 11:22 ` [PATCH 14/19] coresight: trbe: Refactor compute_trbe_buffer_limit() Leo Yan
2025-12-01 11:22 ` [PATCH 15/19] coresight: trbe: Add static key for bypassing trigger mode Leo Yan
2025-12-02 12:10 ` Suzuki K Poulose
2025-12-01 11:22 ` [PATCH 16/19] coresight: trbe: Support " Leo Yan
2025-12-01 11:22 ` [PATCH 17/19] coresight: trbe: Enable circle mode for snapshot Leo Yan
2025-12-01 11:22 ` [PATCH 18/19] coresight: trbe: Add kunit tests Leo Yan
2025-12-01 11:22 ` [PATCH 19/19] perf: cs-etm: Set watermark for AUX trace Leo Yan
2025-12-05 4:48 ` Anshuman Khandual
2025-12-09 14:54 ` James Clark
2025-12-10 2:22 ` Anshuman Khandual
2025-12-05 4:53 ` [PATCH 00/19] coresight: trbe: Support trigger and circle buffer modes Anshuman Khandual
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