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From: Colton Lewis <coltonlewis@google.com>
To: kvm@vger.kernel.org
Cc: Paolo Bonzini <pbonzini@redhat.com>,
	Jonathan Corbet <corbet@lwn.net>,
	 Russell King <linux@armlinux.org.uk>,
	Catalin Marinas <catalin.marinas@arm.com>,
	 Will Deacon <will@kernel.org>, Marc Zyngier <maz@kernel.org>,
	Oliver Upton <oliver.upton@linux.dev>,
	 Mingwei Zhang <mizhang@google.com>,
	Joey Gouly <joey.gouly@arm.com>,
	 Suzuki K Poulose <suzuki.poulose@arm.com>,
	Zenghui Yu <yuzenghui@huawei.com>,
	 Mark Rutland <mark.rutland@arm.com>,
	Shuah Khan <shuah@kernel.org>,
	 Ganapatrao Kulkarni <gankulkarni@os.amperecomputing.com>,
	linux-doc@vger.kernel.org,  linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,  kvmarm@lists.linux.dev,
	linux-perf-users@vger.kernel.org,
	 linux-kselftest@vger.kernel.org,
	Colton Lewis <coltonlewis@google.com>
Subject: [PATCH v5 22/24] KVM: arm64: Add KVM_CAP to partition the PMU
Date: Tue,  9 Dec 2025 20:51:19 +0000	[thread overview]
Message-ID: <20251209205121.1871534-23-coltonlewis@google.com> (raw)
In-Reply-To: <20251209205121.1871534-1-coltonlewis@google.com>

Add KVM_CAP_ARM_PARTITION_PMU to enable the partitioned PMU for a
given VM. This capability is allowed where PMUv3 and VHE are supported
and the host driver was configured with
arm_pmuv3.reserved_host_counters.

Ordering is enforced such that this must be called before the vCPUs
are created to avoid the possibility the guest is already using one
PMU configuration that gets switched out from under it.

The enabled capability is tracked by the new flag
KVM_ARCH_FLAG_PARTITIONED_PMU_ENABLED.

Signed-off-by: Colton Lewis <coltonlewis@google.com>
---
 Documentation/virt/kvm/api.rst    | 24 +++++++++++++++++++++
 arch/arm64/include/asm/kvm_host.h |  2 ++
 arch/arm64/include/asm/kvm_pmu.h  |  9 ++++++++
 arch/arm64/kvm/arm.c              | 15 +++++++++++++
 arch/arm64/kvm/pmu-direct.c       | 35 ++++++++++++++++++++++++++++---
 include/uapi/linux/kvm.h          |  1 +
 6 files changed, 83 insertions(+), 3 deletions(-)

diff --git a/Documentation/virt/kvm/api.rst b/Documentation/virt/kvm/api.rst
index 57061fa29e6a0..ef1b22f20ee71 100644
--- a/Documentation/virt/kvm/api.rst
+++ b/Documentation/virt/kvm/api.rst
@@ -8703,6 +8703,30 @@ This capability indicate to the userspace whether a PFNMAP memory region
 can be safely mapped as cacheable. This relies on the presence of
 force write back (FWB) feature support on the hardware.
 
+
+7.245 KVM_CAP_ARM_PARTITION_PMU
+-------------------------------------
+
+:Architectures: arm64
+:Target: VM
+:Parameters: arg[0] is a boolean that enables or disables the capability
+:Returns: 0 on success
+	  -EPERM if host doesn't support
+	  -EBUSY if vPMU was already created
+
+This API controls the PMU implementation used for VMs. The capability
+is only available if the host PMUv3 driver was configured for
+partitioning via the module parameter
+``arm-pmuv3.reserved_guest_counters=[0-$NR_COUNTERS]``. When enabled,
+VMs are configured to have direct hardware access to the most
+frequently used registers for the counters configured by the
+aforementioned module parameters, bypassing the KVM traps in the
+standard emulated PMU implementation and reducing overhead of any
+guest software that uses PMU capabilities such as ``perf``.
+
+If the host driver was configured for partitioning but the partitioned
+PMU is disabled through this interface, the VM will use the legacy PMU
+
 8. Other capabilities.
 ======================
 
diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h
index f92027d8fdfd0..8431fdebcac43 100644
--- a/arch/arm64/include/asm/kvm_host.h
+++ b/arch/arm64/include/asm/kvm_host.h
@@ -349,6 +349,8 @@ struct kvm_arch {
 #define KVM_ARCH_FLAG_GUEST_HAS_SVE			9
 	/* MIDR_EL1, REVIDR_EL1, and AIDR_EL1 are writable from userspace */
 #define KVM_ARCH_FLAG_WRITABLE_IMP_ID_REGS		10
+	/* Partitioned PMU Enabled */
+#define KVM_ARCH_FLAG_PARTITION_PMU_ENABLED		11
 	unsigned long flags;
 
 	/* VM-wide vCPU feature set */
diff --git a/arch/arm64/include/asm/kvm_pmu.h b/arch/arm64/include/asm/kvm_pmu.h
index 47e6f2a14e381..6146120208e39 100644
--- a/arch/arm64/include/asm/kvm_pmu.h
+++ b/arch/arm64/include/asm/kvm_pmu.h
@@ -111,6 +111,8 @@ void kvm_pmu_load(struct kvm_vcpu *vcpu);
 void kvm_pmu_put(struct kvm_vcpu *vcpu);
 
 void kvm_pmu_set_physical_access(struct kvm_vcpu *vcpu);
+bool kvm_pmu_partition_ready(void);
+void kvm_pmu_partition_enable(struct kvm *kvm, bool enable);
 
 #if !defined(__KVM_NVHE_HYPERVISOR__)
 bool kvm_vcpu_pmu_is_partitioned(struct kvm_vcpu *vcpu);
@@ -327,6 +329,13 @@ static inline void kvm_pmu_host_counters_enable(void) {}
 static inline void kvm_pmu_host_counters_disable(void) {}
 static inline void kvm_pmu_handle_guest_irq(u64 govf) {}
 
+static inline bool kvm_pmu_partition_ready(void)
+{
+	return false;
+}
+
+static inline void kvm_pmu_partition_enable(struct kvm *kvm, bool enable) {}
+
 #endif
 
 #endif
diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c
index 1750df5944f6d..d09f272577277 100644
--- a/arch/arm64/kvm/arm.c
+++ b/arch/arm64/kvm/arm.c
@@ -20,6 +20,7 @@
 #include <linux/irqbypass.h>
 #include <linux/sched/stat.h>
 #include <linux/psci.h>
+#include <linux/perf/arm_pmu.h>
 #include <trace/events/kvm.h>
 
 #define CREATE_TRACE_POINTS
@@ -37,6 +38,7 @@
 #include <asm/kvm_emulate.h>
 #include <asm/kvm_mmu.h>
 #include <asm/kvm_nested.h>
+#include <asm/kvm_pmu.h>
 #include <asm/kvm_pkvm.h>
 #include <asm/kvm_pmu.h>
 #include <asm/kvm_ptrauth.h>
@@ -132,6 +134,16 @@ int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
 		}
 		mutex_unlock(&kvm->lock);
 		break;
+	case KVM_CAP_ARM_PARTITION_PMU:
+		if (kvm->created_vcpus) {
+			r = -EBUSY;
+		} else if (!kvm_pmu_partition_ready()) {
+			r = -EPERM;
+		} else {
+			r = 0;
+			kvm_pmu_partition_enable(kvm, cap->args[0]);
+		}
+		break;
 	default:
 		break;
 	}
@@ -388,6 +400,9 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
 	case KVM_CAP_ARM_PMU_V3:
 		r = kvm_supports_guest_pmuv3();
 		break;
+	case KVM_CAP_ARM_PARTITION_PMU:
+		r = kvm_pmu_partition_ready();
+		break;
 	case KVM_CAP_ARM_INJECT_SERROR_ESR:
 		r = cpus_have_final_cap(ARM64_HAS_RAS_EXTN);
 		break;
diff --git a/arch/arm64/kvm/pmu-direct.c b/arch/arm64/kvm/pmu-direct.c
index 2ee99d6d2b6c1..6cfba9caeea0e 100644
--- a/arch/arm64/kvm/pmu-direct.c
+++ b/arch/arm64/kvm/pmu-direct.c
@@ -45,8 +45,8 @@ bool kvm_pmu_is_partitioned(struct arm_pmu *pmu)
 }
 
 /**
- * kvm_vcpu_pmu_is_partitioned() - Determine if given VCPU has a partitioned PMU
- * @vcpu: Pointer to kvm_vcpu struct
+ * kvm_pmu_is_partitioned() - Determine if given VCPU has a partitioned PMU
+ * @kvm: Pointer to kvm_vcpu struct
  *
  * Determine if given VCPU has a partitioned PMU by extracting that
  * field and passing it to :c:func:`kvm_pmu_is_partitioned`
@@ -56,7 +56,36 @@ bool kvm_pmu_is_partitioned(struct arm_pmu *pmu)
 bool kvm_vcpu_pmu_is_partitioned(struct kvm_vcpu *vcpu)
 {
 	return kvm_pmu_is_partitioned(vcpu->kvm->arch.arm_pmu) &&
-		false;
+		test_bit(KVM_ARCH_FLAG_PARTITION_PMU_ENABLED, &vcpu->kvm->arch.flags);
+}
+
+/**
+ * kvm_pmu_partition_ready() - If we can enable/disable partition
+ *
+ * Return: true if allowed, false otherwise.
+ */
+bool kvm_pmu_partition_ready(void)
+{
+	return kvm_pmu_partition_supported() &&
+		kvm_supports_guest_pmuv3() &&
+		armv8pmu_hpmn_max > -1;
+}
+
+/**
+ * kvm_pmu_partition_enable() - Enable/disable partition flag
+ * @kvm: Pointer to vcpu
+ * @enable: Whether to enable or disable
+ *
+ * If we want to enable the partition, the guest is free to grab
+ * hardware by accessing PMU registers. Otherwise, the host maintains
+ * control.
+ */
+void kvm_pmu_partition_enable(struct kvm *kvm, bool enable)
+{
+	if (enable)
+		set_bit(KVM_ARCH_FLAG_PARTITION_PMU_ENABLED, &kvm->arch.flags);
+	else
+		clear_bit(KVM_ARCH_FLAG_PARTITION_PMU_ENABLED, &kvm->arch.flags);
 }
 
 /**
diff --git a/include/uapi/linux/kvm.h b/include/uapi/linux/kvm.h
index 52f6000ab0208..2bb2f234df0e6 100644
--- a/include/uapi/linux/kvm.h
+++ b/include/uapi/linux/kvm.h
@@ -963,6 +963,7 @@ struct kvm_enable_cap {
 #define KVM_CAP_RISCV_MP_STATE_RESET 242
 #define KVM_CAP_ARM_CACHEABLE_PFNMAP_SUPPORTED 243
 #define KVM_CAP_GUEST_MEMFD_FLAGS 244
+#define KVM_CAP_ARM_PARTITION_PMU 245
 
 struct kvm_irq_routing_irqchip {
 	__u32 irqchip;
-- 
2.52.0.239.gd5f0c6e74e-goog


  parent reply	other threads:[~2025-12-09 20:52 UTC|newest]

Thread overview: 56+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-12-09 20:50 [PATCH v5 00/24] ARM64 PMU Partitioning Colton Lewis
2025-12-09 20:50 ` [PATCH v5 01/24] arm64: cpufeature: Add cpucap for HPMN0 Colton Lewis
2025-12-10 10:54   ` Suzuki K Poulose
2025-12-12 19:22     ` Colton Lewis
2025-12-09 20:50 ` [PATCH v5 02/24] KVM: arm64: Move arm_{psci,hypercalls}.h to an internal KVM path Colton Lewis
2025-12-09 20:51 ` [PATCH v5 03/24] KVM: arm64: Include KVM headers to get forward declarations Colton Lewis
2025-12-09 20:51 ` [PATCH v5 04/24] KVM: arm64: Move ARM specific headers in include/kvm to arch directory Colton Lewis
2025-12-09 20:51 ` [PATCH v5 05/24] KVM: arm64: Reorganize PMU includes Colton Lewis
2025-12-09 20:51 ` [PATCH v5 06/24] KVM: arm64: Reorganize PMU functions Colton Lewis
2025-12-09 20:51 ` [PATCH v5 07/24] perf: arm_pmuv3: Introduce method to partition the PMU Colton Lewis
2025-12-09 20:51 ` [PATCH v5 08/24] perf: arm_pmuv3: Generalize counter bitmasks Colton Lewis
2025-12-09 20:51 ` [PATCH v5 09/24] perf: arm_pmuv3: Keep out of guest counter partition Colton Lewis
2025-12-10 20:21   ` kernel test robot
2025-12-12 20:29     ` Colton Lewis
2025-12-09 20:51 ` [PATCH v5 10/24] KVM: arm64: Set up FGT for Partitioned PMU Colton Lewis
2025-12-09 21:08   ` Oliver Upton
2025-12-12 20:51     ` Colton Lewis
2025-12-09 20:51 ` [PATCH v5 11/24] KVM: arm64: Writethrough trapped PMEVTYPER register Colton Lewis
2025-12-10 18:31   ` kernel test robot
2025-12-12 20:27     ` Colton Lewis
2025-12-09 20:51 ` [PATCH v5 12/24] KVM: arm64: Use physical PMSELR for PMXEVTYPER if partitioned Colton Lewis
2025-12-09 21:14   ` Oliver Upton
2025-12-12 20:54     ` Colton Lewis
2025-12-09 20:51 ` [PATCH v5 13/24] KVM: arm64: Writethrough trapped PMOVS register Colton Lewis
2025-12-09 21:19   ` Oliver Upton
2025-12-12 21:06     ` Colton Lewis
2025-12-09 20:51 ` [PATCH v5 14/24] KVM: arm64: Write fast path PMU register handlers Colton Lewis
2025-12-09 20:51 ` [PATCH v5 15/24] KVM: arm64: Setup MDCR_EL2 to handle a partitioned PMU Colton Lewis
2025-12-09 21:33   ` Oliver Upton
2025-12-12 21:22     ` Colton Lewis
2025-12-09 20:51 ` [PATCH v5 16/24] KVM: arm64: Account for partitioning in PMCR_EL0 access Colton Lewis
2025-12-09 21:37   ` Oliver Upton
2025-12-12 21:31     ` Colton Lewis
2025-12-09 20:51 ` [PATCH v5 17/24] KVM: arm64: Context swap Partitioned PMU guest registers Colton Lewis
2025-12-09 21:55   ` Oliver Upton
2025-12-12 21:57     ` Colton Lewis
2025-12-09 20:51 ` [PATCH v5 18/24] KVM: arm64: Enforce PMU event filter at vcpu_load() Colton Lewis
2025-12-09 22:00   ` Oliver Upton
2025-12-12 21:59     ` Colton Lewis
2025-12-09 20:51 ` [PATCH v5 19/24] KVM: arm64: Implement lazy PMU context swaps Colton Lewis
2025-12-09 22:06   ` Oliver Upton
2025-12-12 22:25     ` Colton Lewis
2025-12-15 18:06       ` Oliver Upton
2025-12-09 20:51 ` [PATCH v5 20/24] perf: arm_pmuv3: Handle IRQs for Partitioned PMU guest counters Colton Lewis
2025-12-09 22:45   ` Oliver Upton
2025-12-12 22:36     ` Colton Lewis
2025-12-09 20:51 ` [PATCH v5 21/24] KVM: arm64: Inject recorded guest interrupts Colton Lewis
2025-12-09 22:52   ` Oliver Upton
2025-12-12 22:55     ` Colton Lewis
2025-12-15 17:50       ` Oliver Upton
2025-12-09 20:51 ` Colton Lewis [this message]
2025-12-09 22:58   ` [PATCH v5 22/24] KVM: arm64: Add KVM_CAP to partition the PMU Oliver Upton
2025-12-12 22:59     ` Colton Lewis
2025-12-09 20:51 ` [PATCH v5 23/24] KVM: selftests: Add find_bit to KVM library Colton Lewis
2025-12-09 20:51 ` [PATCH v5 24/24] KVM: arm64: selftests: Add test case for partitioned PMU Colton Lewis
2025-12-09 23:00 ` [PATCH v5 00/24] ARM64 PMU Partitioning Oliver Upton

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