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X-CSE-ConnectionGUID: HmTV0pyNRjCVD0hKNgbcHg== X-CSE-MsgGUID: 0w/+hcOyTUC3kFBEU+pbBQ== X-IronPort-AV: E=McAfee;i="6800,10657,11638"; a="92847894" X-IronPort-AV: E=Sophos;i="6.20,264,1758610800"; d="scan'208";a="92847894" Received: from orviesa008.jf.intel.com ([10.64.159.148]) by fmvoesa101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 Dec 2025 10:31:50 -0800 X-CSE-ConnectionGUID: sjzEvg3oQTG3/3GQD9wleA== X-CSE-MsgGUID: hyVtDifxTlaUirZgxJqxuQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.20,264,1758610800"; d="scan'208";a="196647077" Received: from lkp-server01.sh.intel.com (HELO d335e3c6db51) ([10.239.97.150]) by orviesa008.jf.intel.com with ESMTP; 10 Dec 2025 10:31:45 -0800 Received: from kbuild by d335e3c6db51 with local (Exim 4.98.2) (envelope-from ) id 1vTOyU-000000003dR-1S1d; Wed, 10 Dec 2025 18:31:42 +0000 Date: Thu, 11 Dec 2025 02:31:00 +0800 From: kernel test robot To: Colton Lewis , kvm@vger.kernel.org Cc: oe-kbuild-all@lists.linux.dev, Paolo Bonzini , Jonathan Corbet , Russell King , Catalin Marinas , Will Deacon , Marc Zyngier , Oliver Upton , Mingwei Zhang , Joey Gouly , Suzuki K Poulose , Zenghui Yu , Mark Rutland , Shuah Khan , Ganapatrao Kulkarni , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, linux-perf-users@vger.kernel.org, linux-kselftest@vger.kernel.org, Colton Lewis Subject: Re: [PATCH v5 11/24] KVM: arm64: Writethrough trapped PMEVTYPER register Message-ID: <202512110209.GjVZa9ti-lkp@intel.com> References: <20251209205121.1871534-12-coltonlewis@google.com> Precedence: bulk X-Mailing-List: linux-perf-users@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20251209205121.1871534-12-coltonlewis@google.com> Hi Colton, kernel test robot noticed the following build errors: [auto build test ERROR on ac3fd01e4c1efce8f2c054cdeb2ddd2fc0fb150d] url: https://github.com/intel-lab-lkp/linux/commits/Colton-Lewis/arm64-cpufeature-Add-cpucap-for-HPMN0/20251210-055309 base: ac3fd01e4c1efce8f2c054cdeb2ddd2fc0fb150d patch link: https://lore.kernel.org/r/20251209205121.1871534-12-coltonlewis%40google.com patch subject: [PATCH v5 11/24] KVM: arm64: Writethrough trapped PMEVTYPER register config: arm64-randconfig-001-20251210 (https://download.01.org/0day-ci/archive/20251211/202512110209.GjVZa9ti-lkp@intel.com/config) compiler: aarch64-linux-gcc (GCC) 14.3.0 reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20251211/202512110209.GjVZa9ti-lkp@intel.com/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot | Closes: https://lore.kernel.org/oe-kbuild-all/202512110209.GjVZa9ti-lkp@intel.com/ All errors (new ones prefixed by >>): arch/arm64/kvm/sys_regs.c: In function 'writethrough_pmevtyper': >> arch/arm64/kvm/sys_regs.c:1183:34: error: implicit declaration of function 'kvm_pmu_event_mask'; did you mean 'kvm_pmu_evtyper_mask'? [-Wimplicit-function-declaration] 1183 | eventsel = val & kvm_pmu_event_mask(vcpu->kvm); | ^~~~~~~~~~~~~~~~~~ | kvm_pmu_evtyper_mask vim +1183 arch/arm64/kvm/sys_regs.c 1168 1169 static bool writethrough_pmevtyper(struct kvm_vcpu *vcpu, struct sys_reg_params *p, 1170 u64 reg, u64 idx) 1171 { 1172 u64 eventsel; 1173 u64 val = p->regval; 1174 u64 evtyper_set = ARMV8_PMU_EXCLUDE_EL0 | 1175 ARMV8_PMU_EXCLUDE_EL1; 1176 u64 evtyper_clr = ARMV8_PMU_INCLUDE_EL2; 1177 1178 __vcpu_assign_sys_reg(vcpu, reg, val); 1179 1180 if (idx == ARMV8_PMU_CYCLE_IDX) 1181 eventsel = ARMV8_PMUV3_PERFCTR_CPU_CYCLES; 1182 else > 1183 eventsel = val & kvm_pmu_event_mask(vcpu->kvm); 1184 1185 if (vcpu->kvm->arch.pmu_filter && 1186 !test_bit(eventsel, vcpu->kvm->arch.pmu_filter)) 1187 val |= evtyper_set; 1188 1189 val &= ~evtyper_clr; 1190 1191 if (idx == ARMV8_PMU_CYCLE_IDX) 1192 write_pmccfiltr(val); 1193 else 1194 write_pmevtypern(idx, val); 1195 1196 return true; 1197 } 1198 -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki