From: Leo Yan <leo.yan@arm.com>
To: Arnaldo Carvalho de Melo <acme@kernel.org>,
Namhyung Kim <namhyung@kernel.org>,
Ian Rogers <irogers@google.com>,
James Clark <james.clark@linaro.org>,
Mike Leach <mike.leach@linaro.org>,
Will Deacon <will@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Jiri Olsa <jolsa@kernel.org>,
Adrian Hunter <adrian.hunter@intel.com>,
Al Grant <al.grant@arm.com>
Cc: linux-arm-kernel@lists.infradead.org,
linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org,
Leo Yan <leo.yan@arm.com>
Subject: [PATCH v2 2/2] perf c2c: Update documentation for adding memory event table
Date: Fri, 12 Dec 2025 17:25:00 +0000 [thread overview]
Message-ID: <20251212-perf_c2c_update_event-v2-2-27df9a6cb1d4@arm.com> (raw)
In-Reply-To: <20251212-perf_c2c_update_event-v2-0-27df9a6cb1d4@arm.com>
Users may occasionally need to see which options are applied to memory
events. This helps to understand the behavior of "perf c2c" and
"perf mem", and provides guidance for configuring memory event options
directly.
Add a table to track memory events and their corresponding options, and
include the Arm SPE events in it.
Suggested-by: Al Grant <al.grant@arm.com>
Signed-off-by: Leo Yan <leo.yan@arm.com>
---
tools/perf/Documentation/perf-c2c.txt | 51 +++++++++++++++++++++++++----------
1 file changed, 37 insertions(+), 14 deletions(-)
diff --git a/tools/perf/Documentation/perf-c2c.txt b/tools/perf/Documentation/perf-c2c.txt
index 40b0f71a2c44eb642ff3bb234631a614b7c4fc9d..e57a122b8719f1b2e20dd509959fc1563a6c20fd 100644
--- a/tools/perf/Documentation/perf-c2c.txt
+++ b/tools/perf/Documentation/perf-c2c.txt
@@ -160,20 +160,43 @@ Following perf record options are configured by default:
-W,-d,--phys-data,--sample-cpu
-Unless specified otherwise with '-e' option, following events are monitored by
-default on Intel:
-
- cpu/mem-loads,ldlat=30/P
- cpu/mem-stores/P
-
-following on AMD:
-
- ibs_op//
-
-and following on PowerPC:
-
- cpu/mem-loads/
- cpu/mem-stores/
+The following table lists the events monitored on different architectures.
+Unless specified otherwise with the -e option, the tool will select the
+default events.
+
+ +--------+---------------+-----------------+--------------------------------------------------------------------------------+
+ | Arch | Configuration | Options | Events |
+ +--------+---------------+-----------------+--------------------------------------------------------------------------------+
+ | Intel | Default | -e ldlat-loads | cpu/mem-loads,ldlat=30/P |
+ | | | -e ldlat-stores | cpu/mem-stores/P |
+ | |---------------+-----------------+--------------------------------------------------------------------------------+
+ | | Load only | -e ldlat-loads | cpu/mem-loads,ldlat=30/P |
+ | |---------------+-----------------+--------------------------------------------------------------------------------+
+ | | Store only | -e ldlat-stores | cpu/mem-stores/P |
+ +--------+---------------+-----------------+--------------------------------------------------------------------------------+
+ | Intel | Default | -e ldlat-loads | {cpu/mem-loads-aux/,cpu/mem-loads,ldlat=30/}:P |
+ | with | | -e ldlat-stores | cpu/mem-stores/P |
+ | AUX |--------------+------------------+--------------------------------------------------------------------------------+
+ | | Load only | -e ldlat-loads | {cpu/mem-loads-aux/,cpu/mem-loads,ldlat=30/}:P |
+ | |---------------+-----------------+--------------------------------------------------------------------------------+
+ | | Store only | -e ldlat-stores | cpu/mem-stores/P |
+ +--------+---------------+-----------------+--------------------------------------------------------------------------------+
+ | AMD | Default | -e mem-ldst | ibs_op// (without latency support) |
+ | | | | ibs_op/ldlat=30/ (with latency support) |
+ +--------+---------------+-----------------+--------------------------------------------------------------------------------+
+ | PowerPC| Default | -e ldlat-loads | cpu/mem-loads/ |
+ | | | -e ldlat-stores | cpu/mem-stores/ |
+ | |---------------+-----------------+--------------------------------------------------------------------------------+
+ | | Load only | -e ldlat-loads | cpu/mem-loads/ |
+ | |---------------+-----------------+--------------------------------------------------------------------------------+
+ | | Store only | -e ldlat-stores | cpu/mem-stores/ |
+ +--------+---------------+-----------------+--------------------------------------------------------------------------------+
+ | Arm | Default | -e spe-ldst | arm_spe_0/ts_enable=1,pa_enable=1,load_filter=1,store_filter=1,min_latency=30/ |
+ | SPE |---------------+-----------------+--------------------------------------------------------------------------------+
+ | | Load only | -e spe-load | arm_spe_0/ts_enable=1,pa_enable=1,load_filter=1,min_latency=30/ |
+ | |---------------+-----------------+--------------------------------------------------------------------------------+
+ | | Store only | -e spe-store | arm_spe_0/ts_enable=1,pa_enable=1,store_filter=1/ |
+ +--------+---------------+-----------------+--------------------------------------------------------------------------------+
User can pass any 'perf record' option behind '--' mark, like (to enable
callchains and system wide monitoring):
--
2.34.1
next prev parent reply other threads:[~2025-12-12 17:25 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-12 17:24 [PATCH v2 0/2] perf arm_spe: Minor event configs housekeeping Leo Yan
2025-12-12 17:24 ` [PATCH v2 1/2] perf mem: Simplify Arm SPE event config Leo Yan
2025-12-12 17:25 ` Leo Yan [this message]
2025-12-15 8:40 ` [PATCH v2 2/2] perf c2c: Update documentation for adding memory event table James Clark
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